Spansion Llc.

Fasl LLC

Ed Hsia

Darlene G Hamilton

Alykhan Madhani

Kenneth Yu

Pau-Ling Chen

Fatima Bathul

Masato Horiike

The present invention determines or identifies programming variations for different groups within an array or memory device that properly program memory cells within the respective groups. Then, during programming operations for a given memory cell, programming voltages are applied according to the determined or identified programming variations for the group to which the given memory cell belongs. These adjusted programming variations facilitate successful programming of the particular memory cell.

Method of determining voltage compensation for flash memory devices

Methods of erasing a sector of multi-level flash memory cells (MLB) having three or more data states to a single data state are provided. The present invention employs an interactive sector erase algorithm that repeatedly erases, verifies, soft programs, and programs the sector in two or more erase phases to achieve highly compact data state distributions. In one example, the algorithm essentially erases all the MLB cells of the sector to an intermediate state and corresponding threshold voltage value using interactive erasing, soft programming and programming pulses in a first phase. Then in a second phase, the algorithm further erases all the MLB cells of the sector using additional interactive erasing and soft programming pulses until a final data state is achieved corresponding to a desired final threshold voltage value of the cells. Optionally, the algorithm may include one or more additional phases of similar operations that successively bring the memory cells of the sector to a compacted common erased state in preparation for subsequent programming operations. In one aspect of the method, the actual threshold values and/or data states chosen for these phases may be predetermined and input to the memory device by the user.

Erase algorithm for multi-level bit flash memory

Methods of programming NEW data into unprogrammed bits of a group of memory cells is provided. The method applies an interactive programming algorithm that individually verifies and programs the NEW data, reference (REF) data, and existing or OLD data. OLD data is separately verified to a compensated program verify level from that of the NEW data to improve memory reliability and insure minimal uniform stress levels to the array. The improved programming algorithm prevents older data from being needlessly refreshed, thus mitigating stress to the cells that eventually causes the data areas to decay at different rates and become prematurely unreliable.

Multi bit program algorithm

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Saratoga, CA, United States of America

Ed Hsia