Powervation Limited

University of Limerick

Rohm Powervation Limited

Eamon O'Malley

Karl Rinne

Patrick J Meehan

Paul Kelleher

Anthony Kelly

Basil Almukhtar

An integrated switching regulator device has a switching mode regulator comprising an input voltage source and a switching circuit coupled to the input voltage source configured to generate a pulsed voltage from the input voltage. A low pass filter is coupled to the switching regulator and is configured to filter the pulsed voltage to provide a regulated voltage to a load. The low pass filter comprises at least two LC stages, wherein the first LC stage comprises an air cored inductor and each subsequent LC stage comprises a non-air cored inductor. The switching circuit comprises two or more switching elements configurable to operate at a switching frequency of several megahertz.

Integrated switching regulator device using mixed-core inductors

A switched mode power supply converter comprises a circuit pulse matching circuit configured to negate output voltage disturbance or noise during switching operation of a power conversion. The current pulse matching circuit input is driven by, or from, a power converter switch node of the switched mode power supply converter. The current pulse matching circuit comprises a rate-of-voltage change detection circuit driven by the power converter switch node.

System and method for current pulse matching technique in a switched mode power converter

The present disclosure is directed generally to switch mode power supplies operating in a master-slave configuration and provides a method of synchronizing the PWM outputs from the master and slave devices to avoid problems such, for example, as the generation of beat frequencies.

Pulse width modulation synchronization of switched mode power converters

The Application is directed at arrangements at which switch mode power converters share a common load. More particularly, the application provides a masterless arrangement in which no single converter controls the operation of the other converters. This is achieved by an arrangement in which each converter attempts to share its current measurement with other converters through an arbitration scheme employed on a data line, with the winning converter providing a defacto current measurement; for example, a maximum or minimum, to the overall arrangement.

Digital stress share method

A DPWM () has a locked loop () which receives an input clock signal and provides an out-of-phase delayed clock at the output of each cell in the loop (). A multiplexer () selects one of the cell outputs at any one time. This allows the DPWM () to have a greater resolution which would otherwise be achieved with the same input clock. The resolution is further increased using an interpolator. A programmable module () has a control block () which interfaces with external CPU and DSP hosts and transmits programmed parameters to finite state machine controllers (), each providing an independent output.

Digital pulse width modulator

A DPWM () has a delay lock loop () which receives an input clock signal and provides an out-of-phase delayed clock at the output of each of eight delay cells (). A multiplexer () selects one of the delay cell outputs at any one time. This allows the DPWM () to have eight times the resolution which would otherwise be achieved with the same input clock. A programmable module () has a control block () which interfaces with external CPU and DSP hosts and transmits programmed parameters to finite state machine controllers (), each providing an independent output.

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Claremorris, Ireland

Eamon O'Malley