USA As Represented by Secretary of the Navy

Dwight R Wilcox

Peter N Pham

Weldon J Dahlke

Aldan D Gomez

David B Schmiedeberg

A radar target simulator outputs multiple video and timing signals for a selected radar type from a single computer bus card slot. Several targets including cluster targets may be simulated at conveniently selectable signal-to-noise ratios. Multiple radar types may be simulated concurrently using additional bus card slots in a single desktop computer.

Radar/IFF simulator circuit for desktop computer

The computer hardware executive is a special purpose associative processor hich interfaces to the memory bus of a digital computer to provide high-speed execution of executive functions. These functions include task registration, task synchronization, normal, time-dependent and time-critical event registration and triggering, hierarchical event-to-semaphore translation, and buffer allocation. The programmer invokes an executive function by accessing the address in the hose computer address space dedicated to that function. The data written to or read from that address is the function operated or result, respectively. The hardware executive maintains task and event tables internally within its associative memory. The memory is organized such that the same field bit position of all table entries is accessed in parallel within a microinstruction cycle. Searches are performed by sequencing through the bit positions of interest. The computer hardware executive also contains an internal clock for comparison against time-dependent and time-critical event registrations. The executive function algorithms are executed by an internal microprogram.

Computer hardware executive

An interface for transmitting data in either a clock edge triggered synchous transmission mode or an asynchronous transmission mode. An edge triggered register has its input connected to a source of digital data and its output connected to a two-to-one multiplexer. A bypass path connected between the digital data source and the multiplexer is provided around the edge triggered register. The two-to-one multiplexer is selectively actuable to provide either asynchronous transmission by connecting the bypass path to an output means or to provide synchronous transmission by connecting the output of the edge triggered register to the output means.

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San Diego, CA, United States of America

Dwight R Wilcox