Texas Instruments Corporation

Dushmantha Bandara Rajapaksha

Wesley Ray

Vijayalakshmi Devarajan

Roland Sperlich

Anant Shankar Kamath

Maxwell G Robertson

Hao Liu

Hugh Thomas Mair

Vishnu Ravinuthula

Richard Sterling Broughton

A semiconductor package includes a transformer having a primary winding and a secondary winding. The primary winding has first and second terminals and a pair of taps. The secondary winding has first and second terminals and a pair of taps. The semiconductor package includes first and second data transfer circuits, a bridge, and a rectifier. The first data transfer circuit is coupled to the pair of taps of the primary winding. The second data transfer circuit is coupled to the pair of taps of the secondary winding. The bridge is coupled to the first and second terminals of the primary winding. The rectifier is coupled to the first and second terminals of the secondary winding.

Data and power isolation barrier

A lead frame for a multi-chip module includes a first conductor structure disposed on a substrate and having first and second arms linked at an angle. The first conductor structure is connected to ground. The lead frame also includes a second conductor structure disposed on the substrate and connected to a voltage supply. The second conductor structure is spaced apart and electrically isolated from the first conductor structure. The first and the second conductor structures are arranged to flank a plurality of integrated circuits (ICs) including one or more surge protection ICs disposed on the substrate. The first conductor structure is electrically connected to the plurality of ICs to provide electrical connections to ground, and the second conductor structure is electrically connected to the plurality of ICs to provide electrical connections to the voltage supply.

Lead frame for multi-chip modules with integrated surge protection

Systems and methods are disclosed for an integrated circuit (IC) comprising an oscillator, an on-off-keying modulator configured to modulate input data coupled to the oscillator, a serial communications transmitter coupled to the on-off-keying modulator, a serial communications receiver coupled to the serial communications transmitter by a set of cables, and an envelope detector coupled to the serial communications receiver. In the IC, power and data are simultaneously delivered across the same set of cables from the serial communications transmitter to the serial communications receiver.

Power delivery and data communication over a single pair of cables

A transceiver includes a driver stage and a transient-triggered ring suppression circuit. The driver stage has a first transistor coupled between a supply voltage terminal and a first bus terminal and a second transistor coupled between a ground and a second bus terminal. The transient-triggered ring suppression circuit is coupled to the first and second transistors. The transient-triggered ring suppression circuit is configured to be enabled upon transition of the transceiver from a dominant state to a recessive state. Further, while the transceiver is in the recessive state, the transient-triggered ring suppression circuit is configured to attenuate ringing on at least one of the first or second bus terminals.

Bus transceiver with ring suppression

In an embodiment of the invention, a frequency divider in a phase-locked loop (PLL) circuit is provided power from the power supply that provides power to a transmission circuit. The PLL is configured to receive a first direct current (DC) reference voltage, a second DC voltage and a reference clock signal. The PLL is configured to generate a transmission clock signal. A transmission circuit is configured to receive the transmission clock signal, the second DC voltage and a data bus where the data bus includes a plurality of data bits in parallel. The transmission circuit transmits data serially.

Growing community of inventors

Allen, TX, United States of America

Dushmantha Bandara Rajapaksha