Virginia Tech Intellectual Properties, Inc.

Huntington Ingalls, Inc.

Other

The Boeing Company

Rolls-royce Corporation

The University of Nottingham

Virginia Polytechnic Institute and State University

Dushan Boroyevich

Rolando Burgos

Paolo Mattavelli

Jun Wang

Fred Wang

Dong Dong

Kamiar J Karimi

Bo Wen

Zhiyu Shen

Marko Jaksic

Ruxi Wang

Kaushik Rajashekara

Mohamed Belkhayat

Sheau-Wei Johnny Fu

Jacob Verhulst

Christina DiMarino

Yue Xu

Keyao Sun

Stephen Andrew Long

Jin Li

Mark Johnson

Joshua Stewart

Gerald T Francis

Jinjun Liu

Nidhi Haryani

Mark Cairnie

C Mark Johnson

He Song

Bo Zhou

Sungjae Ohn

Fang Luo

Fang Chen

Zheng Chen

Timothy N Thacker

Lingxiao Xue

Marko D Jaksic

Topologies and configurations of step-down power supplies including unidirectional balancing cells are described. In one example, a step-down power supply includes an input and an output, a string of series-connected capacitors, and a plurality of unidirectional balancing cells coupled to the capacitors in the string of series-connected capacitors. A first balancing can be configured to transfer power, unilaterally, in a first direction among at least two capacitors in the string of series-connected capacitors, and a second balancing cell can be configured to transfer power, unilaterally, in a second direction among at least two capacitors in the string of series-connected capacitors, where the first direction is different than the second direction. The power supply can also include a gate controller for a balancing cell. The gate controller generates switching control signals at a first switching frequency that is decoupled from a resonant frequency of a balancing branch in the balancing cell.

Voltage-balancing non-isolated high-step-down-ratio power supply

An inductor having a coaxial structure is described. In one example, the structure of the single-turn inductor can include a conductor, an insulation layer, a shielding layer, and a magnetic core. An air duct can be located between the shielding layer and the magnetic core. The shielding layer and the magnetic core can both be connected to a ground. In one example, the single-turn inductor can include a single-layer termination structure formed on terminations of the shielding layer. In another example, the single-turn inductor can include a double-layer termination structure formed on terminations of the shielding layer. Displacement current in the single-turn inductor can be reduced using, for example, lumped equivalent circuit models, a semi-conductive shielding layer model, or a resistive layer and conductive shielding layer model.

High-density single-turn inductor

Aspects of an efficient compensation network for reducing reactive power in a wireless power transfer (WPT) system are disclosed. The compensation network comprises a series/series (S/S) constant current (CC) source, a reactive power compensation capacitor, and a constant current (CC)-to-constant voltage (CV) network. In an example, the S/S CC source comprises a first capacitor connected in series with a first inductor on a primary side of a transformer and a second inductor on a secondary side of the transformer. The S/S CC source converts an input voltage signal of the WPT system into a constant alternating current (AC) current signal. In an example, the CC-to-CV network comprises at least a third capacitor and a third inductor. The CC-to-CV network converts the constant AC current signal into a constant AC voltage signal.

Series/series resonant topology for wireless power transfer

A number of different sealed interfaces for power modules are described. In one example, a sealed interface includes a printed circuit board including a contact pad for power conduction to a bus bar of the printed circuit board, a semiconductor module including at least one power transistor, a terminal pin electrically coupled to the power module, and a housing for the power module. The housing includes an open terminal aperture that extends through the housing. The printed circuit board is seated upon the open terminal aperture, to close and seal the open terminal aperture, with the contact pad positioned within the open terminal aperture. The terminal pin contacts the contact pad of the printed circuit board within the open terminal aperture, and the open terminal aperture comprises a transitional feature to abate electric field intensity around an interface between the open terminal aperture and the printed circuit board.

Sealed interface power module housing

Aspects of hybrid-current-mode switching-cycle control are described. In one embodiment, a peak current mode is selected to control a switching power cell. The switching power cell is in an arm of a phase leg of a modular multilevel converter. The phase leg includes an upper arm and a lower arm, and the switching power cell includes a capacitor and at least one switch. At least one switch control signal switches the switching power cell according to a peak current mode based on at least one arm current boundary crossing identified for the arm.

Hybrid-current-mode switching-cycle control

Various embodiments of laminated planar bus structures that minimize electromagnetic interference (EMI) and parasitic inductance are described. In one embodiment, a laminated planar bus structure may include a plurality of stacked conductive layers and a plurality of stacked insulation layers. The plurality of stacked conductive layers may include positive and negative conductive layers, and conductive ground layers stacked as outer layers as to enclose vertically the positive and the negative conductive layers. In another embodiment, the laminated planar bus structure may include a middle ground layer stacked in between the positive and the negative conductive layers to provide additional reduction in electric field strength. A laminated planar bus structure that is integrated with other power electronics components is also presented.

Low impedance multi-conductor layered bus structure with shielding

A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.

Three-phase, three-level inverters and methods for performing soft switching with phase synchronization

Aspects of non-linear droop control are described herein. In one embodiment, a system includes a first power converter or source configured to provide power to a bus, a second power converter or source configured to provide power to the bus, and a load electrically coupled to the bus. The system also includes a controller configured to adjust a droop resistance associated with the first power source according to a continuous non-linear function based on an amount of current supplied to the load by the first power source. The system can also include a second controller configured to adjust a droop resistance associated with the second power source according to the continuous non-linear function (or another continuous non-linear function). The use of the continuous non-linear functions achieves tighter voltage regulation particularly at lower loads and better load sharing at higher loads.

Non-linear droop control

The present invention provides a battery charger and battery charging method controlled with a charging waveform input of an AC-DC switching circuit to a DC link and a DC-DC stage converter for outputting a regulated DC voltage. The method determining the charging waveform comprising the steps of selecting a Pulse Width Modulation (PWM) zero-off charging waveform signal input to the AC-DC switching circuit and calculating a ripple power at the DC link based on the signal input power and output power of the regulated DC voltage output.

Optimal battery current waveform for bidirectional PHEV battery charger

In one example, a power converter includes a modular multilevel converter (MMC) electrically coupled between a first power system and a second power system. The MMC includes an arrangement of switching submodules, and the switching submodules include an arrangement of switching power transistors and capacitors. The MMC also includes a controller configured to inject a common mode frequency signal into a circulating current control loop. The circulating current control loop is relied upon to reduce at least one low frequency component in power used for charging the capacitors in the switching submodules. By injecting the common mode frequency signal into the circulating current control loop, the switching submodules can be switched at higher frequencies, the capacitances of the capacitors in the MMC can be reduced, and the power density of the MMC can be increased.

Circulating current injection control

In a switching module structure that includes a low-impedance path to ground, such as a parasitic capacitance of an insulating substrate, a further insulating substrate presenting a parasitic capacitance placed in series with the low impedance current path and a connection of a conductive layer to input voltage rails using a single decoupling capacitor or, preferably, a midpoint of the voltage rails formed by a series connection of decoupling capacitors maintains a large portion of common mode (CM) currents which are due to high dV/dt slew rates of SiC and GaN transistors within the switching module.

Semiconductor module arrangement

In a modular multi-level power converter, additional switching states are interleaved between main switching states that control output voltage or waveform. The additional switching states provide current from a DC-link to charge capacitors in respective modules or cells to an offset voltage from which the capacitor voltages are controlled toward a reference voltage during each switching cycle rather than being allowed to build up over a period of an output waveform of variable line frequency, possibly including zero frequency. Since the switching cycle is much shorter than the duration of a line frequency cycle and the capacitor voltages are balanced during each switching cycle, output voltage ripple can be limited as desired with a capacitor of much smaller value and size than would otherwise be required.

Power-cell switching-cycle capacitor voltage control for modular multi-level converters

Wobbling the operating frequency of a phase-locked loop (PLL), preferably by adding a periodic variation is feedback gain or delay in reference signal phase allows the avoidance of any non-detection zone that might occur due to exact synchronization of the phase locked loop operating frequency with a reference signal. If the change in PLL operating frequency is periodic, it can be made of adequate speed variation to accommodate and time requirement for islanding detection or the like when a reference signal being tracked by the PLL is lost. Such wobbling of the PLL operating frequency is preferably achieved by addition a periodic variable gain in a feedback loop and/or adding a periodically varying phase delay in a reference signal and/or PLL output.

Anti-islanding detection for three-phase distributed generation

A method for impedance measurement using chirp signal injection is provided. The method includes injecting at least one chirp signal into the three-phase AC system, and collecting at least one response to the at least one chirp signal. The method further includes transferring the at least one response from abc coordinates to dq coordinates. At least one impedance is calculated based on the at least one response to the at least one chirp signal.

System and method for impedance measurement using chirp signal injection

A method for impedance measurement in a three-phase AC system is provided. The method includes injecting a shunt perturbation signal into the three-phase AC system and collecting a response to the shunt perturbation signal, and injecting a series perturbation signal into the three-phase AC system and collecting a response to the series perturbation signal. The response to the shunt perturbation signal and the response to the series perturbation signal are then transferred from abc coordinate to dq coordinates. At least one impedance of the three-phase AC system is calculated based on the response to the shunt perturbation signal and the response to the series perturbation signal.

Growing community of inventors

Blacksburg, VA, United States of America

Dushan Boroyevich