Sun Microsystems, Inc.

Duong Tong

Liuxi Yang

A memory control unit has been developed. The control unit includes a command &ldquo;spin wheel&rdquo; which schedules the order of read and write commands to the memory. It also includes a read &ldquo;spin wheel&rdquo; which ensures proper timing of the read commands and a write &ldquo;spin wheel&rdquo; which ensures proper timing of the write commands.

Spin-wheel SDRAM access scheduler for high performance microprocessors

A method for programming a controller of a memory unit has been developed. The method includes inputting variable initialization parameters of the memory unit and a clock delay and a command delay for each parameter. Based on each pair of clock delays and command delays, calculate a set of delays for a read command and a write command. Calculate the system performance for each pair of clock and command delays bases on the read and write delays and select the initial parameters that offer optimum system performance.

Method for programming clock delays, command delays, read command parameter delays, and write command parameter delays of a memory controller in a high performance microprocessor

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Duong Tong