Zenith Electronics Corporation

Duc Ngo

Gopal K Srivastava

Kishan R Pulluru

Timothy J Donovan

A television receiver includes conventional systems for receiving a broadcast type signal and displaying the received signal upon a cathode ray tube. Vertical and horizontal scan system oscillators and controls produce vertical and horizontal scan signal synchronized to the reference sync signals. A scan clock system cooperates with the horizontal oscillator and control system to produce horizontal scan related signals which are synchronized to the CRT scan.

Adaptive scan control having horizontal scan locked clock system

A skew code generator for digitally quantizing the width of a pulse. A series connected string of identical voltage controllable delay elements is supplied with the pulse, which is sensed as it passes through each of the delay elements. Output signals are developed in response to the leading edge of the pulse and are latched in response to the trailing edge of the pulse. An encoder generates a binary output from the latched output signals, which is indicative of the width of the pulse.

Skew code generator for measuring pulses width using a delay line

A BICMOS voltage controllable delay element has an input terminal that is supplied with an input voltage from a pair of BICMOS transmission gates. The input voltage is either a control voltage or a reference voltage as determined by the state of an input signal. A first BICMOS inverter is switched by the input voltage and the charge and discharge of a timing capacitor is controlled by the magnitude of the control voltage and the reference voltage. A second BICMOS inverter responds to the timing capacitor voltage for developing an output signal voltage that is phase delayed with respect to the input signal voltage. A precision delay element using a PLL circuit is shown as are a frequency multiplier arrangement and a pulse width measuring arrangement.

Voltage controlled delay element

A delay circuit includes an output voltage controllable BICMOS delay element that is coupled to a phase locked loop that develops a control voltage. The control voltage is applied to the output BICMOS delay element and to another BICMOS delay element in the phase locked loop. An input voltage is applied to the phase locked loop and, along with the output of the phase locked loop, to the output BICMOS delay element.

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Chicago, IL, United States of America

Duc Ngo