Air Products and Chemicals, Inc.

Sandia Corporation

International Business Machines Corporation

Other

Superconducting Core Technologies, Inc.

Duane B Dimos

Diwakar Garg

Paul N Dyer

Praveen Chaudhari

Jochen D Mannhart

Chang Chyi Tsuei

Leslie E Schaffer

Ernest L Wrecsics

Carl F Mueller

Cheng-Chung J Chi

Joseph T Evans, Jr

Jennifer Ann Lewis

Husam N Al-Shareef

William L Warren

Joseph Cesarano, Iii

Terry Joseph Garino

Bruce A Tuttle

David Galt

Carl H Mueller

Gordon E Pike

J Charles Barbour

Robert William Schwartz

Sherry L Morisette

Mark Victor Raymond

The effects of processing parameters and suspension chemorheology on the deposition behavior of SFF components derived from polymeric-based gelcasting suspensions combines the advantages associated with SFF fabrication, including the ability to spatially tailor composition and structure as well as reduced tooling costs, with the improved handling strength afforded by the use of gel based formulations. As-cast free-formed Al O components exhibited uniform particle packing and had minimal macro-defects (e.g., slumping or stair casing) and no discernable micro-defects (e.g., bubbles or cracking).

Solid freeform fabrication using chemically reactive suspensions

The present invention is directed to a method for forming dielectric thin films having substantially reduced electrical losses at microwave and millimeter wave frequencies relative to conventional dielectric thin films. The reduction in losses is realized by dramatically increasing the grain sizes of the dielectric films, thereby minimizing intergranular scattering of the microwave signal due to grain boundaries and point defects. The increase in grain size is realized by heating the film to a temperature at which the grains experience regrowth. The grain size of the films can be further increased by first depositing the films with an excess of one of the compoents, such that a highly mobile grain boundary phase is formed.

Tuneable dielectric films having low electrical losses

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

Methods of fabricating applique circuits

A method is described for altering the luminescence of a light emitting semiconductor (LES) device. In particular, a method is described whereby a silicon LES device can be selectively irradiated with a radiation source effective for altering the intensity of luminescence of the irradiated region.

Method for altering the luminescence of a semiconductor

An improved ferroelectric capacitor exhibiting reduced imprint effects in comparison to prior art capacitors. A capacitor according to the present invention includes top and bottom electrodes and a ferroelectric layer sandwiched between the top and bottom electrodes, the ferroelectric layer comprising a perovskite structure of the chemical composition ABO.sub.3 wherein the B-site comprises first and second elements and a dopant element that has an oxidation state greater than +4. The concentration of the dopant is sufficient to reduce shifts in the coercive voltage of the capacitor with time. In the preferred embodiment of the present invention, the ferroelectric element comprises Pb in the A-site, and the first and second elements are Zr and Ti, respectively. The preferred dopant is chosen from the group consisting of Niobium, Tantalum, and Tungsten. In the preferred embodiment of the present invention, the dopant occupies between 1 and 8% of the B-sites.

Ferroelectric capacitor with reduced imprint

A method is disclosed for fabricating grain boundary junction devices, which comprises preparing a crystalline substrate containing at least one grain boundary therein, epitaxially depositing a high Tc superconducting layer on the substrate, patterning the superconducting layer to leave at least two superconducting regions on either side of the grain boundary and making electrical contacts to the superconducting regions so that bias currents can be produced across the grain boundary.

Method for forming grain boundary junction devices using high T.sub.c

A method for heat treating a coated substrate is described wherein the outer coating on the substrate is comprised of a chemically vapor deposited mixture of tungsten and tungsten carbide. The coated substrate is heated to the deposition temperature or not substantially above the deposition temperature in a non-reactive atmosphere. The heat treating temperature is sufficient to confer a desired improvement in erosive and abrasive wear resistance in the outer coating but does not result in substantial degradation of the mechanical properties of the substrate or in formation of undesirable inter-metallic layers.

Heat treated chemically vapor deposited products and treatment method

High T.sub.c superconducting devices are described in which controlled grain boundaries in a layer of the superconductors forms a weak link or barrier between superconducting grains of the layer. A method is described for reproducibly fabricating these devices, including first preparing a substrate to include at least one grain boundary therein. A high T.sub.c superconductor layer is then epitaxially deposited on the substrate in order to produce a corresponding grain boundary in the superconducting layer. This superconducting layer is then patterned to leave at least two regions on either side of the grain boundary, the two regions functioning as contact areas for a barrier device including the grain boundary as a current flow barrier. Electrical contacts can be made to the superconducting regions so that bias currents can be produced across the grain boundary which acts as a tunnel barrier or weak link connection.

Grain boundary junction devices using high T.sub.c superconductors

The method for producing the disclosed material comprises chemical vapor depositing on the substrate a substantially columnar, intermediate layer of tungsten and chemical vapor depositing on the intermediate layer a non-columnar, substantially lamellar outer layer of a mixture of tungsten and tungsten carbide. The tungsten carbide comprises W.sub.2 C, W.sub.3 C, or a mixture of both wherein the ratio of the thickness of the tungsten intermediate layer to the thickness of the outer layer is at least: (a) 0.35 in the case of tungsten plus W.sub.2 C in the outer layer, (b) 0.6 in the case of a mixture of tungsten and W.sub.3 C in the outer layer and (c) 0.35 in the case of mixtures of tungsten and W.sub.2 C and W.sub.3 C in the outer layer. The chemical vapor deposition steps are carried out at pressures within the range of 1 Torr to 1,000 Torr and temperatures within the range of about 300.degree. to about 650.degree. C.

Method for depositing highly erosive and abrasive wear resistant

'A coated substrate product is described wherein the outer coating on the substrate is comprised of a chemically vapor deposited and heat treated mixture of tungsten and tungsten carbide. The tungsten carbide phase consists of W.sub.2 C or W.sub.3 C or a mixture of W.sub.2 C and W.sub.3 C. During the heat treating, the coated substrate is heated to the deposition temperature or not substantially above the deposition temperature in a non-reactive atmosphere. The heat treating temperature is sufficient to confer a desired improvement in erosive and abrasive wear resistance in the outer coating but does not result in substantial degradation of the mechanical properties of the substrate or in formation of undesirable inter-metallic layers'.

Heat treated chemically vapor deposited products

A highly erosive and abrasive wear resistant composite coating system is described in which an intermediate layer of substantially pure tungsten is deposited on a substrate. An outer layer is then deposited comprised of a mixture of tungsten and tungsten carbide, with the tungsten carbide consisting of W.sub.2 C, W.sub.3 C or a mixture of both. The thickness of the intermediate layer is sufficient to confer substantial erosive and abrasive wear resistance characteristics on the composite coating system. The ratio of the thickness of the intermediate layer to the thickness of the outer layer is controlled and is at least above 0.30 in the cases of W+W.sub.3 C, W+W.sub.2 C+W.sub.3 C and W+W.sub.2 C coatings.

Growing community of inventors

Albuquerque, NM, United States of America

Duane B Dimos