Lg Innotek Co., Ltd.

Samsung Electronics Co., Ltd.

Skhynix Inc.

Du Hyun Kim

Jeong Hyeon Choi

Jae Wook Kim

Jeung Mo Kang

Yong Seung Yi

Hyun Seok Kim

Dong Il Son

Ho Yeong Lim

Yong Jae Lee

Ho Sub Lim

Je Kook Kim

Jae Il Lim

Seul Gi Lee

Sung Eun Lee

Bo Ra Kim

Do Hyuk Yoo

Tae Lee Lee

Dong Ii Son

Byeong Bae Hyeon

A circuit board according to an embodiment includes an insulating layer; and a via formed in the insulating layer; wherein a width of an upper surface of the via is greater than a width of a lower surface of the via, and wherein the width of the lower surface of the via is 75% to 95% of the width of the upper surface of the via.

Circuit board and method for manufacturing same

A memory system includes a memory device including a plurality of banks, each including row and column spares for replacing defective rows and columns; and a memory controller suitable for controlling an operation of the memory device, wherein the memory controller includes: a built-in self-test (BIST) circuit suitable for performing a test operation on the banks and generating fail addresses for each bank based on a result of the test operation; and a built-in redundancy analysis (BIRA) circuit suitable for determining first and second spare counts by respectively counting the number of repairable row spares and repairable column spares, and selecting a target repair address from the fail addresses for each bank, according to the first and second spare counts.

Redundancy analysis circuit and memory system including the same

A semiconductor system includes a process control circuit configured to determine whether to perform a patrol training operation, generate a voltage code signal for adjusting a level of a reference voltage which determines a logic level of data in a target memory circuit, and adjust the voltage code signal on the basis of a fail information signal corresponding to the target memory circuit, an operation control circuit configured to receive a command and an address from a host, generate, from the command, a write signal and a read signal for performing a normal operation, and generate, from the address, an internal address for performing the normal operation and an error detection circuit configured to detect an error in the data by receiving the data from the target memory circuit, and generate the fail information signal depending on whether the error has occurred in the data.

Semiconductor system related to performing a training operation

An electronic device which can control battery charging on the basis of the state of a battery by checking the voltage of a battery and the output voltage of a charging circuit, while the battery is being charged in a constant current state, and determining the state of the battery on the basis of at least the voltage of the battery and the output voltage of the charging circuit. Other various embodiments identified in the description are possible.

Method and device for controlling charging on basis of state of battery

A memory system includes a host error correction code (ECC) encoder and a memory module. The host ECC encoder performs a host ECC encoding operation of write data to output host ECC encoded data, and the memory module includes a memory medium receiving the host ECC encoded data and a module controller controlling the memory medium. The module controller includes a parity remover and a module ECC decoder. The parity remover removes parity data from the host ECC encoded data to generate parity-removed data and performs a first write operation for writing the parity-removed data into the memory medium. The module ECC decoder performs a module ECC decoding operation of the host ECC encoded data to generate module ECC decoded data and performs a second write operation for writing the module ECC decoded data into the memory medium.

Memory systems and writing methods of the memory systems

Disclosed is an electronic device including a battery; a temperature sensor; a charging circuit configured to charge the battery; a coil antenna; and at least one processor configured to measure a temperature corresponding to at least a part of the electronic device by using the temperature sensor; charge the battery depending on a first charging characteristic by using the charging circuit and supply a current to the coil antenna to allow the coil antenna to emit heat, when the temperature satisfies a first specified condition; and charge the battery depending on a second charging characteristic by using the charging circuit, when the temperature satisfies a second specified condition, after the current is supplied.

Apparatus and method for charging battery based on temperature

An electronic device includes a power management circuit which supplies power from a battery to electronic components, a battery management circuit which controls connection between the battery and the power management circuit, a physical key formed on a part of the electronic device, a key control circuit which controls connection between the physical key and the battery management circuit, and a processor connected to the power management circuit. The processor is configured to transmit a signal for powering off the electronic device to the power management circuit, and when the electronic device is powered off, to control the key control circuit to connect the physical key with the battery management circuit. The power management circuit is configured to, when receiving the signal for powering off the electronic device, control the battery management circuit to disconnect the battery from the one or more electronic components included in the electronic device.

Method and apparatus for managing battery of electronic device

A memory system includes a memory medium configured to store memory data and a media error correction code (ECC) decoder coupled to the memory medium. The media ECC decoder is configured to receive encoded read data from the memory medium, wherein the encoded read data is read from the stored memory data. The media ECC decoder is further configured to decode the encoded read data when the encoded read data is not poison data and a number of erroneous bits for the encoded read data is less than or equal to a threshold value. The media ECC decoder is also configured to skip decoding the encoded read data when the encoded read data is poison data and the number of erroneous bits for the encoded read data is less than or equal to the threshold value.

Memory systems including memory controllers and memory modules and methods of processing data in the memory systems

An electronic device includes a housing, a display device exposed through a first part of the housing, a recess formed in a second part of the housing, a receptacle formed in the recess, a plurality of conductive contacts disposed inside the receptacle and including a first contact, a first circuit that supplies and/or receives a current of a first level or larger to and/or from the first contact when an external connector is inserted into the receptacle, a first switching device that electrically connects the first circuit with the first contact or to interrupt a connection between the first circuit and the first contact, a second circuit that detects existence of a foreign object contacting the first contact while the external connector is inserted into the receptacle and a control circuit that controls the first switching device based at least in part on information regarding the detected existence of the foreign object.

Electronic device supporting USB interface and control method for USB interface

Provided are a light emitting device, a light emitting device package and a lighting system including the same. The light emitting device (LED) comprises a substrate, a 5 second conductive type semiconductor layer, an active layer, a first conductive type semiconductor layer and a first electrode. The vertical distances between the first conductive type semiconductor layer and the second conductive type semiconductor layer are varied.

Light emitting device, light emitting device package and lighting system including the same

A light emitting device (LED) and Package of the same are provided. The LED comprises a first conductivity type semiconductor layer, an active layer, a second conductivity type semiconductor layer, a first dielectric layer, and a first electrode layer. The first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer are on a substrate. The first dielectric layer covers the edges of the second conductivity type semiconductor layer and the active layer. The first electrode layer covers the edge of the first conductivity type semiconductor layer.

LED and LED package

Provided are a light emitting device, a light emitting device package and a lighting system comprising the same. The light emitting device comprises a light emitting structure comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, and an anti-reflection region on a lateral surface of the light emitting structure.

A backlight unit includes a bottom cover; a light emitting module on the bottom cover and including a substrate and a plurality of light emitting devices, each light emitting device including a light emitting structure having a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; and a light guide member on the light emitting module and including at least one insertion cavity into which at least one of the plurality of light emitting devices is inserted, wherein the at least one insertion cavity is opened only on one side.

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Seoul, South Korea

Du Hyun Kim