Motorola Corporation

Douglas W Hendricks

Frank J Juskey

Jonathon G Greenwood

Frank J Juskey, Jr

Richard Lee Mangold

Christopher Lee Becher

Anthony B Suppelsa

William B Mullen, Iii

Dale W Dorinski

Jerrold S Pine

Glenn F Urbish

John P Cheraso

Stefan Peana

Kenneth M Wasko

M William Branan, Jr

Reed A George

Martin J McKinley

Sally A Stallings

Scott Joslin

A display module (207) is used that integrates circuit components (402-422) thereto. The display module (207) includes a displayable element (101), and a first conductive runner (206) located on a backside of the display module (207) that couples to the displayable element (101). Additionally, display module (207) includes at least one layer of substrate material (208, 210) covering the backside of the display module (207) with a portion of the first conductive runner (206) exposed, and a first conductive coupling element (212, 302) coupled to the portion of the first conductive runner (206).

Selective call receiver having a display module with integrated circuits

A process (200) for fabricating a flex circuit (708, 806, 812, 818 or 824) using a fabrication process without the use of a photomask includes the steps of generating (412) an electronic image (702 or 802) of circuit traces (704 or 804) representing at least a single-sided flex circuit, and selectively thermal transferring (506 or 606) a resin to either a conductively clad or non-conductive flexible substrate (304) under the control of the electronic image (702 or 802) to form either an etch resist or a conductor which defines the circuit traces (704 or 804). The conductively clad flexible substrate (304) is etched to form the circuit traces (704 or 804) of the flex circuit defined by the etch resist, after which the etch resist is removed.

Process for fabricating flex circuits and product thereby

A novel process for plating a substrate without solder mask wherein the substrate is coated with a polymer catalyst to assist adhesion of conductive metal to the substrate. Next, a first plating mask photopolymer, or plating resist, is coated over the polymer catalyst, a circuit pattern is imaged onto the first plating mask and the first plating mask is developed to reveal windows, or circuit traces, in the first plating mask corresponding to the circuit pattern to be embodied on the substrate. Thereafter, a first conductive material such as copper is plated into the windows, and, thereafter, a second conductive material such as nickel may be plated into the windows on top of the first conductive material. Then, the first plating mask is removed from the substrate, leaving behind the conductive material in the form of the desired circuit pattern. Next, a second plating mask photopolymer is formed over the substrate and conductive materials, and an I/O interconnect mask corresponding to the I/O interconnect pads is photo-optically imaged onto the second plating mask and the second plating mask is developed to remove portions thereof, creating 'interconnect voids,' corresponding to the interconnect pads. Thereafter, a third conductive material such as gold is plated into the interconnect voids to create conductive I/O pads.

Method for plating a substrate to eliminate the use of a solder mask

A method of producing multi-layered chip carriers by coating the surface of a base layer with a photosensitive dielectric material which forms a dielectric layer; curing at least a portion of the dielectric layer by exposure to radiation; depositing a catalyst on the cured portion of the dielectric layer to form a sensitized dielectric layer; applying a photoresist layer upon the sensitized dielectric layer; curing at least a portion of the photoresist layer; developing the cured photoresist layer by removing uncured portions, thereby exposing corresponding portions of the underlying sensitized dielectric layer; forming conductors on the exposed dielectric layer; stripping the cured photoresist layer: coating a layer of photosensitive dielectric material upon the cured dielectric layer; and repeating the steps to produce successive layers which form a multi-layer chip carrier having a plurality of conductor layers separated by layers of insulating dielectric material.

Method for producing high density multi-layer integrated circuit carriers

A method of interconnecting circuit modules (30) to mother boards (50) each having a plurality of mating solder pads (32, 52) is available. The solder pads (32, 52) have respective pairs of arms (40, 42) and (54, 56) with a venting channel (36, 58) formed between each pair of arms to vent solder medium when the solder pads are reflowed to interconnect the circuit modules and mother boards.

Method and structure for attaching a circuit module to a circuit board

According to the present invention, a screen printer (200) selectively applies solder paste to multiple types of printed circuit boards. The screen printer (200) includes mobile placement equipment (210), which receives and transports the boards, and application equipment, which includes first and second stencils (225), frames for holding the stencils (225) in fixed positions, and an applicator (415) for applying solder paste to a board through either the first or second stencil (225). A controller (215) determines the type of a board received by the mobile placement equipment (210), then, when the board is of a first type, directs the mobile placement equipment (210) to a location aligned with the first stencil. When the board is of a second type, the mobile placement equipment (210) is directed to a location aligned with the second stencil.

Apparatus for selectively applying solder paste to multiple types of

A wire bond pad arrangement (104) has an improved pad density for providing a plurality of wire bond terminations for interconnection with corresponding terminations (604) of an IC chip (302. The wire bond pad arrangement (104) includes a substrate (102) and a plurality of pads (912) disposed on the substrate (102) adjacent to one another to form a row of pads (912). Each of the pads (912) is formed in a trapezoidal shape having short and long sides parallel to one another and substantially perpendicular to a line from a central point of the pad (912) to a central point of the corresponding termination (604) of the IC chip (302). The long sides of adjacent pads (912) are positioned alternately towards and away from the corresponding terminations (604) of the IC chip 302).

Wire bond pad arrangement having improved pad density

An integrated circuit (70) is soldered to a printed circuit board (200) by first depositing flux (116) on bumps (75) of the integrated circuit. Solder (214) is deposited upon the bumps (75), and the integrated circuits is (70) placed in contact with pads (210) on the printed circuit board (200). After reflow, a solder joint (230) electrically and mechanically attaches the integrated circuit (70) to the printed circuit board (200). Alternatively, the solder tipped (214) bumps (75) may be placed in contact with a non-adhering flat plane (300) such as glass during the heating process. After reflow, each bump has a flat portion (350), and the flat portions of all the bumps form a plane (400) which further facilitates attaching the integrated circuit (70) to the printed circuit board (200).

Direct chip attachment structure and method

A single screen printer (200) holds at least two solder stencils (225). The screen printer (200) receives a printed circuit board (105) and determines a printed circuit board configuration. When the printed circuit board (105) is of a first configuration, the printed circuit board (105) is aligned with a first stencil (225) and solder paste is selectively applied to the printed circuit board (105) through the first stencil (225). When the printed circuit board (105) is of a second configuration, the printed circuit board is aligned with a second stencil (225) through which solder paste is selectively applied to the printed circuit board (105).

Method and apparatus for selectively applying solder paste to multiple

A flow formed encapsulated integrated circuit package (100) includes a printed circuit substrate (160) having upper and lower opposed surfaces and one or more anchor holes (150). The one or more anchor holes (150) have an upper aperture in the upper surface and a lower aperture in the lower surface. One or more integrated circuit die (130) are electrically and mechanically attached to the upper surface of the substrate (160). In addition, a solder resist mask (190) is attached to the lower surface of the substrate which covers the aperture of the one or more anchor holes (150). Flow formed material (110) is formed around the integrated circuit die (130) so as to encapsulate the one or more integrated circuits (150), the flow formed material (110) covering at a least a portion of the upper surface of the printed circuit substrate (160) and extending substantially into the anchor hole (150).

Anchoring method for flow formed integrated circuit covers

A method and apparatus for use in forming pre-positioned solder bumps (104) on a pad arrangement (100) of a substrate (101) include placing a predetermined pattern (306) of solder preforms (304) in contact with a meltable adhesive fluxing agent (302) on a carrier tape (402), and then heating the fluxing agent (302) to melt it. Next, the fluxing agent (302) is cooled to resolidify it, thereby securing the solder preforms (304) to the carrier tape (402). The carrier tape (402) is then aligned over the pad arrangement (100) and the solder preforms (304) are transferred to the pad arrangement (100) by heating the solder preforms (304) to form the solder bumps (104) in the predetermined pattern (306).

Method and apparatus for use in forming pre-positioned solder bumps on a

A fluxing composition for soldering metals together, contains a carrier solvent, an oxide removing agent, and a nitrogen liberating compound. The oxide removing agent sublimes at or below the temperature at which the metals are soldered together. The nitrogen liberating compound sublimes or decomposes at below the temperature at which the metals are soldered together in order to provide a blanket of inert gas over the metals being soldered. The oxide removing agent is 2-amino-isophthalic acid, 5-amino-isophthalic acid, isophthalic acid, ammonium fluoborate, or ammonium salicylate. The compound that liberates nitrogen upon heating is 1,2-benz-3,4-anthraquinone, 1,2-benz-9,10-anthraquinone, 5,6-chrysoquinone, 6,12-chrysoquinone, 2,3-benzanthraquinone, 2-amino-isophthalic acid, 5-amino-isophthalic acid, or 5-isoquinoline carboxylonitrile. Electronic components are soldered to a circuit board by applying the fluxing composition to the circuit board. The fluxing composition, the component and the circuit board are heated to a temperature sufficient to cause the activator to react with metal oxides on either the component or the circuit board and to sublime, and also to a temperature to cause the nitrogen containing compound to decompose or sublime.

Subliming solder flux composition

In an apparatus for depositing flux onto a solder work surface, a chamber having a plurality of openings therein is heated by means of a U-shaped current conducting heating element within which the flux chamber resides. This heating element heats the flux within the chamber until it vaporizes and is forced from the chamber through the openings onto the solder work surface.

Method and apparatus for applying solder flux

Printed circuit patterns are photolithographically defined on a three dimensional 'projection' surface (204) of a printed circuit substrate (202) using a projection image aligner and a photomask (210) having a planar image (210A). The geometry of the projection is restricted such that the slope of the projection surface, as measured at any point on the projection surface and relative to a reference plane which is parallel to the focal plane of the projection image aligner, is less than 90 degrees. A solution of photoresist includes a photoresist solvent, a fluorosurfactant and an aromatic hydrocarbon solvent, and is preferably sprayed over the projection surface. In one method of manufacture, the printed circuit substrate is moved from one position to another during the exposure of the photoresist layer (206). In another method, after a first portion of the projection surface is exposed by a first photomask (502), a second photomask (504) is substituted and the remainder of the projection surface exposed. In still another method, a photomask having a plurality of planar images (604A, 604B and 606A) each image being positioned parallel to the others but separated by a small distance, is used to simultaneously exposed the entire projection surface.

Process for photoimaging a three dimensional printed circuit substrate

A method for effecting high density solder interconnects between a substrate and at least one metalized film having through holes therein is provided. Solder is first applied to metalized portions of the substrates and the solder is then subject to a reflow process to provide reflowed solder. Pressure is applied to the reflowed solder during a second reflow process to provide prestressed or shaped solder. The metalized film is then positioned with at least one metalized portion adjacent to the shaped solder. Heat, as from a laser, is directed through the through holes in the film to melt the solder and form solder interconnections between the substrate and the metalized film.

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Boca Raton, FL, United States of America

Douglas W Hendricks