Silicon Sensing Systems Limited

Atlantic Inertial Systems, Inc.

Zarlink Semiconductor Limited

Douglas Sitch

Michael Terence Durston

Kevin Townsend

Robertus Laurentius Van Der Valk

Paulus Hendricus Lodewijk Maria Schram

Michael Durston

A method for closed loop operation of a capacitive accelerometer uses a single current source () and a single current sink () to apply an in-phase drive signal V' to a first set of fixed capacitive electrode fingers and a corresponding anti-phase drive signal V&#x2032; to a second set of fixed capacitive electrode fingers. This provides a net electrostatic restoring force on the proof mass for balancing the inertial force of the applied acceleration and maintains the proof mass at a null position.

Accelerometers

A sensor device includes at least two transducers, a sensor signal processing circuit, and a transducer to sensor signal processing circuit electrical connections, each connecting a respective one of the transducers to the sensor signal processing circuit. The device also includes a differential amplifier connected with two bond wires, the bond wires connected to the differential inputs of the differential amplifier and the amplifier output connected to the sensor signal processing circuit.

Pickoff transducer wire bond bit detection

A successive approximation Analog to Digital Converter (ADC), comprising: a sample and hold device arranged to sample and hold an input signal at the beginning of a conversion cycle; a successive approximation register that sequentially builds up a digital output from its most significant bit to its least significant bit; a digital to analog converter that outputs a signal based on the output of the successive approximation register; a comparator that compares the output of the digital to analog converter with an output of the sample and hold device and supplies its output to the successive approximation register; and a residual signal storage device arranged to store the residual signal at the end of a conversion cycle; and wherein the successive approximation ADC is arranged to add the stored residual signal from the residual signal storage device to the input signal stored on the sample and hold device at the start of each conversion cycle. After each ADC full conversion by the SAR, the analog conversion of the digital output is as close to the original input signal as the resolution will allow. However there remains the residual part of the input signal that is smaller than what can be represented by the least significant bit of the digital output of the SAR. In normal operation, successive outputs of a SAR for the same input will result in the same digital value output and the same residual. By storing the residual at the end of each conversion and adding the residual onto the input signal of the next conversion the residuals are accumulated over time so that they may affect the output digital value. After a number of conversions, the accumulated residuals add up to more than the value represented by the LSB of the register and the digital value will be one higher than if a conversion had been performed on the input signal alone. In this way, the residual signal affects the output value in time and thus can be taken into account by processing the digital output in the time domain.

Oversampling noise-shaping successive approximation ADC

An electronic circuit and method for carrying out built in test of a capacitor connected to, and arranged to suppress noise at, an input of an electrical circuit is disclosed. The electronic circuit causes current pulses at the input, and monitors the voltage at the input by comparing the voltage at the input with high and/or low reference voltages, outputting a fault signal if the voltage at the input is greater than a high reference voltage or lower than a low reference voltage.

Critical capacitor built in test

An inertial sensor is described that has a commanded test function. The sensor is of a ring type driven by a driver circuit, the sensor further includes primary and secondary portions having corresponding signal pickoffs. The primary pickoff signal amplitude is controlled via an automatic gain control, the primary phase lock loop and VCO locks to the resonant frequency to provide the clocks for the synchronous detectors, the primary pickoff signals via the primary phase shift circuit is provided to the primary driver, the secondary pickoff signal being input into a detector circuit capable of detecting motion in the sensor. The commanded test function includes a signal derived from the primary portion of the circuit and input into the two inputs of a differential amplifier in the secondary pickoff detector circuit.

Sensor

A digital phase locked loop includes a phase acquisition unit receiving a sampled input signal and applying its output to a first input of a digital phase detector, a digital controlled oscillator producing a digital output, and a feedback path coupling the digital output of the digital controlled oscillator to a second input of the digital phase detector in the digital domain. The input signal may be sampled asynchronously.

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Plymouth, United Kingdom

Douglas Sitch