Bae Systems Information and Electronic Systems Integration Inc.

Other

Douglas S Jansen

Gregory M Flewelling

Kathiravan Krishnamurthi

Thomas E Collins, Iii

Souleymane Gnanou

A power efficient (PE) amplifier includes a cascode amplifier, a transistor amplifier, and a voltage supply. The transistor amplifier includes at least one differential pair of transistors and a plurality of transformers having a primary winding and a tapped secondary winding. The secondary winding is connected across emitters or sources of each transistor pair. The tap of each secondary has a current source. The primary windings of the plurality of transformers are connected in series. The transistor bases or gates are alternating current (AC) grounded. The collector or drain terminal pairs are connected in parallel. The voltage supply is low voltage and supplies a current to the cascode amplifier. The PE amplifier further includes a plurality of current sources which provide a total current to the transistor amplifier. The PE amplifier has, among other things, improved power gain, improved reverse isolation, improved power dissipation, and improved peak differential swing.

Power efficient amplifier

A communications receiver. One example embodiment is a system-in-package (SIP) device, which includes a three-dimensional interposer, a first bandpass filter integrated into the three-dimensional interposer, a first integrated circuit chip on the three-dimensional interposer, a second integrated circuit chip on the three-dimensional interposer, a second bandpass filter integrated into the three-dimensional interposer, and a third bandpass filter integrated into the three-dimensional interposer. The first integrated circuit chip includes a balanced amplifier that receives a first filtered signal and suppress distortion products. The second integrated circuit chip includes a first mixer and a second mixer. The first mixer receives an output of the balanced amplifier and mixes the output with a first oscillator signal. The second bandpass filter receives an output from the first mixer and generates a second filtered signal. The second mixer receives the second filtered signal and mixes the second filtered signal with a second oscillator signal.

High dynamic range receiver integrated into a chip package

A voltage controlled oscillator (VCO) is disclosed to provide reduced phase noise at higher operating frequencies. A buffer-first VCO configured according to an embodiment includes multiple VCO core circuits configured to provide synchronously tuned oscillator signals. Each VCO core circuit is coupled to a summing node through a buffer circuit that generates uncorrelated phase noise such that the summing node provides a summation output of the oscillator signals with reduced phase noise. A multiplexer-less VCO configured according to an embodiment includes multiple buffer-first VCO circuits configured to provide oscillator signals covering a range of frequencies. Each buffer-first VCO circuit is controlled or selected by an enable signal. Buffer circuits are configured to select one of the buffer-first VCO circuits for coupling to a transmission line during a given time period based on the enable signal. The transmission line is terminated in a matched impedance at each end of the line.

Voltage controlled oscillator with reduced phase noise

A mixer device is disclosed, which is fabricated as a bipolar-complementary metal oxide semiconductor (BiCMOS) integrated circuit device, to provide improved linearity and dynamic range, at higher operating frequencies. A mixer device configured according to an embodiment includes a driver circuit comprising bipolar junction transistors (BJTs) to convert a local oscillator signal to a high slew-rate gate drive signal. The driver circuit is configured as a quasi-complementary driver employing NPN BJTs. The mixer device further includes a mixer circuit comprising CMOS field-effect transistors (FETs) configured to mix an input signal with the gate drive signal to generate an output signal through the application of the gate drive signal to the gate port of the CMOS FETs. The mixer device further includes a voltage biasing circuit to provide a biased body voltage to the FETs to allow overdriving to a negative voltage relative to the body voltage.

Mixer driver circuit with improved slew rate

Techniques are disclosed for reducing off-state leakage current in a differential switching device. The techniques can be embodied, for example, in a method that includes receiving a differential input signal at a differential input of each of a primary switch and a dummy switch. In an enabled-state of the device, the method further includes passing the differential input signal to a differential output of the primary switch. In a disabled-state of the device, the method further includes canceling off-state leakage current at the differential output of the primary switch, by virtue of the dummy switch having its differential output reverse-coupled to the differential output of the primary switch. The method may further include preventing the dummy switch from passing signals other than off-state leakage signals. The techniques can be embodied, for instance, in a switching device.

Differential switch with off-state isolation enhancement

Techniques are disclosed for eliminating or otherwise sufficiently suppressing spurious signals. The techniques are particularly useful in applications such as those that employ aggressor frequency sources along with a frequency conversion or mixing function, and especially applications implemented as a system-on-chip. In the spur-training mode, a spur-canceller circuit identifies spurious tones associated with the host system to neutralize those tones when running in a normal mode. The tones are neutralized using a comb generator with variable phase and gain by way of cancellation with comb output signals having substantially the same amplitude and a phase that is 180&#xb0; out of phase with the aggressor tone to be cancelled.

Integrated cancellation circuit for RF converter spurious tones

Techniques are disclosed that allow for programmable attenuation using thermometer code steps. By thermometer coding the attenuator structure, monotonicity is guaranteed or otherwise greatly improved, which eliminates instability problems with automatic gain control loops and without the need for compensation or trimming. In addition, the thermometer coding technique also greatly reduces phase discontinuity between adjacent gain states.

Thermometer coded attenuator

A Gilbert cell mixer design is disclosed. Instead of using a differential transconductance stage as typically done, the design employs a differential transimpedance amplifier input stage. By utilizing a transimpedance input stage to the Gilbert mixer, feedback is used to obtain higher linearity without sacrificing noise performance. The transimpedance input stage supplies a current signal to the cascode connected Gilbert switching quad, so the transimpedance amplifier output is taken from the collector of the transimpedance amplifier output transistor, instead of the emitter as normally done with transimpedance amplifiers.

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Pelham, NH, United States of America

Douglas S Jansen