Rockwell Collins, Inc.

Texas Instruments Corporation

Douglas Robert Johnson

Mark A Kovalan

Mark Clifford Singer

John L Persick

Todd M Neale

John W Roltgen

Bryon L Wiscons

James J Corcoran

Eric J Danielson

Douglas L Bader

Samir S Hemaidan

Corydon J Carlson

Joseph Nodar

John William Roltgen, Iii

Cleveland C Gilbert

Shawn M Stanger

Stephen I Kotalik

Gregory E Dunn

A system includes a first plurality of processors, a second plurality of processors dissimilar from the first plurality of processors, a first arbitration device coupled to the first plurality of processors, and a second arbitration device coupled to the second plurality of processors. The first arbitration device and the second arbitration device is configured to receive event data, store the received event data, and to output the received event data at substantially a same time. At least one processor of the first plurality of processors and at least one processor of the second plurality of processors are configured to access the event data.

Synchronization mechanisms for high-integrity computing

A control system for an aircraft including first and second lanes having respective first and second processors dissimilar to one another and configured to output respective first and second computation data. At least one programmable logic device may be configured to receive the first computation data output and the second computation data output, determine a difference therebetween, and transmit a corrective computation data output to the first processor and the second processor via respective feedback loops if the difference between the first computation data output and the second computation data output exceeds a predetermined threshold value.

System and method for maintaining system integrity in control systems having multi-lane computational differences

A method of comparing output information from dissimilar processors includes storing a task in a first memory and storing the task in a second memory at substantially the same time as the first memory. The time of the storing being is controlled by a first arbitration logic and a second arbitration logic. The method also includes receiving the task by a first processor from the first memory and receiving the task by a second processor from the memory at substantially the same time as the first processor. The time being received is controlled by a first arbitration logic and a second arbitration logic. The second processor being dissimilar to the first processor. The method further includes computing a first output by the first processor based on the task and computing a second output by the second processor based on the task. The method still further includes, synchronizing the first and second outputs so that the first and second outputs are output at substantially the same time. The synchronizing is controlled by the first and second arbitration logic.

High integrity computing via input synchronization systems and methods

A bus system including a bus user apparatus and a method for communicating via the bus system are disclosed. The bus user apparatus includes means for means for selectively coupling a transmitter to the transmission line according to a protocol of the bus system. The bus system provides bi-directional communication over a single transmission line. The transmitter of the transmitting device is coupled to the transmission line during transmission. Upon completion of transmission, the transmitting device sends a permission to transmit signal to the next transmitting device according to the protocol, and decouples its transmitter from the transmission line. The next transmitting device couples its transmitter to the transmission line and begins transmission of data. Multiple bus users, both transmitters and receivers, are accommodated by the bus system, and bi-directional communication is supported. Further, the data transmission rate may be increased by selectively coupling the transmitter of a receiving device to the transmission line to provide a termination impedance on the transmission line. Higher transmission rates may be accommodated without a termination impedance; if necessary, a termination impedance may be applied. If necessary, the output voltage of the transmitter and the sensitivity of the receiver may be adjusted to accommodate the higher transmission rates. The bus system may also accommodate larger sized words. The bus system is compatible with previously existing systems compliant with an ARINC standard while providing increased capability.

Data bus

A current generator (8) is provided. A voltage delta circuit (15) is operable to generate a voltage difference between a first circuit node (NODE 1) and a second circuit node (NODE 2) and is operable to generate a first current (I.sub.1) and a second current (I.sub.2). A junction field-effect-transistor (14) is coupled to the first circuit node (NODE 1) and the second circuit node (NODE 2). The junction field-effect-transistor (14) operates in a resistive region to stabilize a temperature characteristic of the first current (I.sub.1) and the second current (I.sub.2). A current mirror circuit (19) coupled to the voltage delta circuit (15), the current mirror circuit (19) operable to receive the first current (I.sub.1) and the second current (I.sub.2).

Current generator for integrated circuits and method of construction

An integrated circuit device (10) has an operational amplifier (12) and a charge pump (14) for creating a negative voltage level -Vcc. The operational amplifier (12) preferably has various sub-components. In particular, a bias generator (36) is included and connected to a neutral voltage level (31) isolated from the negative voltage level and providing current for operational amplifier (12). An input stage (38) has inputs (16 and 18) for receiving two input signals and maintains the input signals in a balanced signal path. A conversion circuitry (40) receives the input signals and creates a single differential signal eliminating noise received in the input stage (38). An output stage prepares this single differential signal for transfer out of the operational amplifier (12).

Single supply operational amplifier and charge pump device

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Cedar Rapids, IA, United States of America

Douglas Robert Johnson