International Business Machines Corporation

Globalfoundries Inc.

Douglas R G Logan

David S Levitan

Richard James Eickemeyer

Mauricio J Serrano

Brian R Konigsburg

Tejas S Karkhanis

Jose Eduardo Moreira

Predicting indirect branch instructions may comprise predicting a target address for a fetched branch instruction. Accuracy of the target address may be tracked. The fetched branch instruction may be flagged as a problematic branch instruction based on the tracking. A pattern cache may be trained for predicting a more accurate target address for the fetched branch instruction, and the next time the fetched branch instruction is again fetched, a target address may be predicted from the pattern cache.

Predicting indirect branches using problem branch filtering and pattern cache

Tracking global history vector in high performance out of order superscalar processors, in one aspect, may comprise providing a shift register storing global history vector that stores branch predictions and outcomes. A counter is maintained to determine a number of bits to shift the shift register to recover branch history. In another aspect, the global history vector may be implemented with a circular buffer structure. Youngest and oldest pointers to the circular buffer are maintained and used in recovery.

Tracking long GHV in high performance out-of-order superscalar processors

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Austin, TX, United States of America

Douglas R G Logan