California Institute of Technology

United States of America As Represented by the Administrator of Nasa

Douglas J Sheldon

Robert D Rasmussen

Eddy Shalom

Gary R Burke

Timothy L Heaps

Chester J Everline

Paul N Bowerman

Yuan Chen

Unmanned space programs are currently used to enable scientists to explore and research the furthest reaches of outer space. Systems and methods for low power communication devices in accordance with embodiments of the invention are disclosed, describing a wide variety of low power communication devices capable of remotely collecting, processing, and transmitting data from outer space in order to further mankind's goal of exploring the cosmos. Many embodiments of the invention include a Flash-based FPGA, an energy-harvesting power supply module, a sensor module, and a radio module. By utilizing technologies that withstand the harsh environment of outer space, more reliable low power communication devices can be deployed, enhancing the quality and longevity of the low power communication devices, enabling more data to be gathered and aiding in the exploration of outer space.

Remotely powered reconfigurable receiver for extreme sensing platforms

Systems and methods for estimating the lifetime of an electrical system in accordance with embodiments of the invention are disclosed. One embodiment of the invention includes iteratively performing Worst Case Analysis (WCA) on a system design with respect to different system lifetimes using a computer to determine the lifetime at which the worst case performance of the system indicates the system will pass with zero margin or fail within a predetermined margin for error given the environment experienced by the system during its lifetime. In addition, performing WCA on a system with respect to a specific system lifetime includes identifying subcircuits within the system, performing Extreme Value Analysis (EVA) with respect to each subcircuit to determine whether the subcircuit fails EVA for the specific system lifetime, when the subcircuit passes EVA, determining that the subcircuit does not fail WCA for the specified system lifetime, when a subcircuit fails EVA performing at least one additional WCA process that provides a tighter bound on the WCA than EVA to determine whether the subcircuit fails WCA for the specified system lifetime, determining that the system passes WCA with respect to the specific system lifetime when all subcircuits pass WCA, and determining that the system fails WCA when at least one subcircuit fails WCA.

Systems and methods for circuit lifetime evaluation

A high resolution circuit and method for facilitating precise measurement of on-chip delays for FPGAs for reliability studies. The circuit embeds a pulse generator on an FPGA chip having one or more groups of LUTS (the 'LUT delay chain'), also on-chip. The circuit also embeds a pulse width measurement circuit on-chip, and measures the duration of the generated pulse through the delay chain. The pulse width of the output pulse represents the delay through the delay chain without any I/O delay. The pulse width measurement circuit uses an additional asynchronous clock autonomous from the main clock and the FPGA propagation delay can be displayed on a hex display continuously for testing purposes.

Precise delay measurement through combinatorial logic

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Valencia, CA, United States of America

Douglas J Sheldon