Dell Products Inc.

Douglas E Wallace

Bhyrav M Mutnury

Umesh Chandra

Vijender Kumar

Sukumar Muthusamy

A high-speed transmission circuit comprises, as part of a signal path, a connector pin disposed on a pad that comprises an unused pad region. The unused pad region is not considered part of the signal path but is part of a resonant sub-circuit. In various embodiments, by properly adjusting the dimensions of the pad region and other structures in the high-speed transmission circuit, resonant frequencies of the sub-circuit are shifted to a frequency range that is outside of the frequency range of interest in the signal path, thereby, reducing insertion loss and increasing signal integrity without compromising mechanical stability.

Surface mount pads for next generation speeds

An information handling system includes a first component including a transmitter for a high-speed serial data interface, and a second component including a receiver for the high-speed serial data interface. The receiver includes an equalization stage and a decision feedback equalization (DFE) stage. The equalization stage has an input to configure the equalization stage in one of a first low equalization state and a first high equalization state. The DFE stage has a plurality of tap inputs. The first component provides a plurality of training runs on the high-speed serial data interface. The second component receives the training runs, provides for each training run a set of tap settings for each tap input, determines whether or not a variation in the tap settings for the training runs is greater than a predetermined variation value, and, when the variation is greater than the predetermined variation value, sets the first input to configure the first equalization stage from the first low equalization state to the first high equalization state.

Link training scheme for high-speed serializer/deserializer

An information handling system includes a memory that stores code, and a processor that executes code stored in memory to derive a distribution of impedances for parameters of a trace within a printed circuit board (PCB). The processor further to determine impedance corners of the distribution of impedances, to select the impedance corners as first, second, and third trace models, and to derive first, second, and third distribution of losses based on the first, second, and third trace models. The processor further to store loss corners of the first, second, and third distribution of losses as modeling points, and to determine whether all of modeling points pass within tolerance levels of loss and impedance of the trace.

High speed serial links for high volume manufacturing

A signal processing method is disclosed. The method includes identifying a preferred loss profile for a plurality of signal transmission channels and generating a filter transfer function corresponding to each of the plurality of signal transmission channels, where each filter transfer function is configured to produce a filtered signal with a loss profile approximately equal to the preferred loss profile. The method further includes generating a plurality of filtered signals by filtering a plurality of signals using the filter transfer function corresponding to each of the plurality of signal transmission channels. and transmitting the plurality of filtered signals to a plurality of receivers via the plurality of signal transmission channels.

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Round Rock, TX, United States of America

Douglas E Wallace