Intel Corporation

Jds Uniphase Corporation

Tetrasun, Inc.

Other

Formfactor, Inc.

Douglas E Crafts

James F Farrell

Barthelemy Fondeur

Jinxi Shen

Oliver Schultz-Wittmann

Suresh Ramalingam

Jyoti Kiron Bhardwaj

Steven M Swain

Mark Brian Farrelly

Adrian Bruce Turner

David J Chapman

Duane Cook

Eliseo R Ranalli

Kenzo Ishida

Siegfried B Fleischer

Philip Patrick Duggan

Brett Matthew Zaborsky

Takashi Nakamura

Venkatesan Murali

Andrew Alduino

Robert Brainard

Mark D Moravec

Mark A Leonov

David J Dougherty

Hirofumi Ishida

Pang-Chen Sun

Rao S Peddada

Satyanarayana Rao Peddada

Scott Pallady

Robert R McLeod

Denis De Ceuster

Boping Xie

Sanjay M Thekdi

Zi-Wen Dong

Hiroaki Yamada

Anantharaman Vaidyanathan

Anca L Sala

Thomas Nguyen

David Funk

Denis DeCeuster

Yong Ding

David K Nakamoto

Erik W Egan

Niranjan Gopinathan

Yingchao Yan

Bonneville Dudgeon Eggleston

Arne Schonert

Steve Swain

Qin Yang Ong

Oliver Schultz-Wittman

Caroline S Lee

Solar cell structures and formation methods which utilize the surface texture in conjunction with a passivating dielectric layer to provide a practical and controllable technique of forming an electrical contact between a conducting layer and underlying substrate through the passivating dielectric layer, achieving both good surface passivation and electrical contact with low recombination losses, as required for high efficiency solar cells. The passivating dielectric layer is intentionally modified to allow direct contact, or tunnel barrier contact, with the substrate. Additional P-N junctions, and dopant gradients, are disclosed to further limit losses and increase efficiency.

Shielded electrical contact and doping through a passivating dielectric layer in a high-efficiency crystalline solar cell, including structure and methods of manufacture

A method for use in forming a photovoltaic device includes forming a doped semiconductor layer on a surface of a semiconductor substrate and forming a metal film on the doped semiconductor layer. A patterned etched resist is formed on the metal film and a dielectric layer is formed on the doped semiconductor layer and the etched resist. A laser having a wavelength absorbable by the patterned etch resist is applied through the dielectric layer to the patterned etch resist to remove the patterned etch resist.

Photovoltaic devices with fine-line metallization and methods for manufacture

A solar cell formation method, and resulting structure, having a first film and a barrier film over a surface of a doped semiconductor, wherein the optical and/or electrical properties of the first film are transformed in-situ such that a resulting transformed film is better suited to the efficient functioning of the solar cell; wherein portions of the barrier film partially cover the first film and substantially prevent transformation of first film areas beneath the portions of the barrier film.

Selective transformation in functional films, and solar cell applications thereof

Methods of fabricating conductive patterns over a solar cell structure are provided, in which a patterned resist layer is provided over an anti-reflective coating layer formed over a solar cell structure. The patterned resist layer is used to etch the exposed portion of the anti-reflective coating, and a metal seed layer is provided over the resist layer and the exposed portion of the solar cell structure's surface. The metal seed layer is selectively removed from over the patterned resist layer without removal from the exposed portion of the surface of the solar cell structure. Different thermal conductivities of the patterned resist layer and the solar cell structure's surface facilitate the selective removal of the seed layer from over the resist layer. Also provided are methods of facilitating simultaneous fabrication of conductive patterns over a plurality of solar cell structures using one or more frame structures.

Methods of forming solar cells

A wafer-scale probe card for temporary electrical contact to a sample wafer or other device, for burn-in and test. The card includes a plurality of directly metallized single-walled or multi-walled nanotubes contacting a pre-arranged electrical contact pattern on the probe card substrate. The nanotubes are arranged into bundles for forming electrical contacts between areas of the device under test and the probe card. The bundles are compressible along their length to allow a compressive force to be used for contacting the probe card substrate to the device under test. A strengthening material may be disposed around and/or infiltrate the bundles. The nanotubes forming the bundles may be patterned to provide a pre-determined bundle profile. Tips of the bundles may be metallized with a conductive material to form a conformal coating on the bundles; or metallized with a conductive material to form a continuous, single contact surface.

Temporary planar electrical contact device and method using vertically-compressible nanotube contact structures

A tunable PLC optical filter having sequentially connected thermally tunable Mach-Zehnder (MZ) interferometers is described. The MZ interferometers, having free spectral ranges matching ITU frequency grid spacing, are tuned so as to have a common passband centered on the frequency of the signal being selected, while having at least one of the stopbands centered on any other ITU frequency. Any other optical channel that may be present at any other ITU frequency is suppressed as a result. The PLC chip, including a zero-dispersion lattice-filter interleaver stage, a switchable fine-resolution stage and, or a retroreflector for double passing the filter, is packaged into a hot-pluggable XFP transceiver package. A compensation heater is used to keep constant the amount of heat applied to the PLC chip inside the XFP package, so as to lessen temperature variations upon tuning of the PLC optical filter.

Tunable optical filter

A metal grid contact and dielectric pattern on a layer requiring conductive contact in a photovoltaic device. The invention includes, in one aspect, forming a metal film; forming an etch resist over the metal film by, e.g., directly writing and in-situ curing the etch resist using, e.g., ink-jetting or screen-printing; etching the metal film leaving the resist pattern and a metal grid contact pattern under the etch resist intact; forming a dielectric layer over the etch resist; and removing the resist pattern and the dielectric over the etch resist, leaving a substantially co-planar metal grid contact and dielectric pattern. The metal grid contact pattern may form the front and/or back contact electrode of a solar cell; and the dielectric layer may be an optical reflection or antireflection layer. The layer requiring contact may be multifunctional providing its own passivation, such that passivation is substantially not required in the dielectric layer.

Fine line metallization of photovoltaic devices by partial lift-off of optical coatings

A scanning optical spectrometer with a detector array is disclosed, in which position of focused spot of light at the input of a dispersive element such as arrayed waveguide grating (AWG) with a slab input, is scanned using a micro-electro-mechanical (MEMS) tiltable micromirror so as to make the dispersed spectrum of light scan over the detector array coupled to the AWG. Sub-spectra recorded using individual detectors are concatenated by a processor unit to obtain the spectrum of input light.

Scanning spectrometer with multiple photodetectors

A method and an apparatus for calibrating a MEMS actuator of a hybrid MEMS-PLC optical switch or router is described. Two calibrating waveguides, embedded monolithically adjacent to the waveguides that provide the PLC output functions, are used for referencing a MEMS mirror tilt angle by maximizing optical coupling of light, reflected off the MEMS mirror, into one or each of the two calibrating waveguides. The input light is provided by either a waveguide carrying a live optical signal, or by a special input waveguide, coupled to an LED, for providing a calibrating light. Two emitting waveguides, embedded monolithically adjacent to the waveguides that provide the PLC input functions, can be used.

Method and apparatus for referencing a MEMS device

The present invention extends the concept of a standard array waveguide grating (AWG), which focuses each wavelength component launched via an input AWG to a Rowland circle inside a planar lightwave chip (PLC) where discrete waveguides are located, to one which focuses each wavelength component outside of the PLC chip along a straight line. An array of MEMS mirrors or other redirecting elements is positioned at the focus location for independently redirecting each of the wavelength channels back to any number of selected output AWGs formed on the same PLC chip as the input AWG.

Planar lightwave circuit based wavelength selective switch

Growing community of inventors

San Jose, CA, United States of America

Douglas E Crafts