International Business Machines Corporation

Douglas Andrew Buchanan

Evgeni Petrovich Gousev

Patrick Ronald Varekamp

Vijay Narayanan

Supratik Guha

Fenton Read McFeely

Alessandro Cesare Callegari

Eduard Albert Cartier

Matthew Warren Copel

Harald F Okorn-Schmidt

Nestor Alexander Bojarczuk, Jr

Lars-Ake Ragnarsson

Steven M Shank

Arne Watson Ballantine

John Jacob Yurkas

Wade J Hodge

Carol J Heenan

Sampath Purushothaman

Douglas Duane Coolbaugh

Fuad Elias Doany

Jane M Shaw

Naftali Eliahu Lustig

Harold John Hovel

David Earle Seeger

Andrew T Pomerene

Donis G Flagello

Douglas C Latulipe, Jr

Howard M Clearfield

Fredric D Bailey

Christopher M Scherpereel

Kevin K Chan

Cyril Cabral, Jr

Katherine Lynn Saenger

Kenneth Parker Rodbell

Deborah A Neumayer

Paul Charles Jamison

Christopher Peter D'Emic

Michael Abramovich Gribelyuk

Ricky S Amos

Dianne L Lacey

Hyungjun Kim

Joseph S Newbury

Theodore Harold Zabel

Kyle Erik Litz

Mark Monroe Banaszak Holl

Peter D Hob

A method (and resultant structure) of forming a semiconductor structure, includes forming a mixed rare earth oxide on silicon. The mixed rare earth oxide is lattice-matched to silicon.

Semiconductor structure including mixed rare earth oxide formed on silicon

A system and method for patterning metal oxide materials in a semiconductor structure. The method comprises a first step of depositing a layer of metal oxide material over a substrate. Then, a patterned mask layer is formed over the metal oxide layer leaving one or more first regions of the metal oxide layer exposed. The exposed first regions of the metal oxide layer are then subjected to an energetic particle bombardment process to thereby damage the first regions of the metal oxide layer. The exposed and damaged first regions of the metal oxide layer are then removed by a chemical etch. Advantageously, the system and method is implemented to provide high-k dielectric materials in small-scale semiconductor devices. Besides using the ion implantation damage (I/I damage) plus wet etch technique to metal oxides (including metal oxides not previously etchable by wet methods), other damage methods including lower energy, plasma-based ion bombardment, may be implemented. Plasma-based ion bombardment typically uses simpler and cheaper tooling, and results in less collateral damage to underlying structures as the damage profile can be more easily localized to the depth of the thin metal oxide film.

Method for etching chemically inert metal oxides

A method for fabricating a CMOS gate electrode by using Re, Rh, Pt, Ir or Ru metal and a CMOS structure that contains such gate electrodes are described. The work functions of these metals make them compatible with current pFET requirements. For instance, the metal can withstand the high hydrogen pressures necessary to produce properly passivated interfaces without undergoing chemical changes. The thermal stability of the metal on dielectric layers such as SiO, AlOand other suitable dielectric materials makes it compatible with post-processing temperatures up to 1000&#xb0; C. A low temperature/low pressure CVD technique with Re(CO)as the source material is used when Re is to be deposited.

High temperature processing compatible metal gate electrode for pFETS and methods for fabrication

Methods of forming front-end-of the line (FEOL) capacitors such as polysilicon-polysilicon capacitors and metal-insulator-silicon capacitors are provided that are capable of incorporating a high-dielectric constant (k of greater than about 8) into the capacitor structure. The inventive methods provide high capacitance/area devices with low series resistance of the top and bottom electrodes for high frequency responses. The inventive methods provide a significant reduction in chip size, especially in analog and mixed-signal applications where large areas of capacitance are used.

High-dielectric constant insulators for feol capacitors

An apparatus and method of forming an oxynitride insulating layer on a substrate performed by putting the substrate at a first temperature within the main chamber of a furnace, exposing the substrate to a nitrogen containing gas at a second temperature which is higher than the first temperature, and growing the oxynitride layer on the substrate within the main chamber in the presence of post-combusted gases. The higher temperature nitrogen containing gases are combusted in a chamber outside the main chamber. The higher temperature is in the range of 800 to 1200&#xb0; C., and preferably 950&#xb0; C. In a second embodiment, distributed NO gas injectors within the main chamber deliver the nitrogen containing gas. The nitrogen containing gas is pre-heated outside the chamber. The nitrogen containing gas is then delivered to a gas manifold that splits the gas flow and directs the gas to a number of gas injectors, preferably two to four injectors within the main process tube. Gas injection orifices on the order of several millimeters then distribute the pre-decomposed gas to the wafers, producing a more uniformly N-doped wafer load in a batch furnace.

Apparatus and method for forming an oxynitride insulating layer on a semiconductor wafer

Method of forming lattice-matched structure on silicon and structure formed thereby

A method for forming an oxynitride gate dielectric in a semiconductor device and gate dielectric structure formed by the method are disclosed. In the method, an oxynitride layer is first formed on a silicon surface and then re-oxidized with a gas mixture containing oxygen and at least one halogenated species such that an oxynitride layer with a controlled nitrogen profile and a layer of substantially silicon dioxide formed underneath the oxynitride film is obtained. The oxynitride film layer can be formed by either contacting a surface of silicon with at least one gas that contains. nitrogen and/or oxygen at a temperature of not less than 500&deg; C. or by a chemical vapor deposition technique. The re-oxidation process may be carried out by a thermal process in an oxidizing halogenated atmosphere containing oxygen and a halogenated species such as HCl, CH Cl , C H Cl , C H Cl . CH Cl and CHCl .

Oxynitride gate dielectric and method of forming

The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.

Nitrogen-rich barrier layer and structures formed

A method of forming a high-k dielectric material which exhibits a substantially lower amount of trap charge within a gate stack region is provided. The method maintains high-temperatures (250&deg; C. or above) such that the substrate wafer is not cooled during the various processing steps. Such a method leads to the formation of a high-k dielectric material which does not exhibit a hysteric behavior in a capacitance-voltage curve as well as an increased mobility on FETs using conventional CMOS processing.

High mobility FETS using A1203 as a gate oxide

High-dielectric constant insulators for FEOL capacitors

A method for integrating a high-k material into CMOS processing schemes is provided. The method includes forming an interfacial oxide, oxynitride and/or nitride layer on a device region of a semiconductor substrate, said interfacial layer having a thickness of less than 10 &angst;; and (b) forming a high-k dielectric material on said interfacial oxide, oxynitride and/or, nitride layer, said high-k dielectric having a dielectric constant, k, of greater than 8.

Interfacial oxidation process for high-k gate dielectric process integration

An apparatus and method of forming an oxynitride insulating layer on a substrate performed by putting the substrate at a first temperature within the main chamber of a furnace, exposing the substrate to a nitrogen containing gas at a second temperature which is higher than the first temperature, and growing the oxynitride layer on the substrate within the main chamber in the presence of post-combusted gases. The higher temperature nitrogen containing gases are combusted in a chamber outside the main chamber. The higher temperature is in the range of 800 to 1200&deg; C., and preferably 950&deg; C. In a second embodiment, distributed N O gas injectors within the main chamber deliver the nitrogen containing gas. The nitrogen containing gas is pre-heated outside the chamber. The nitrogen containing gas is then delivered to a gas manifold that splits the gas flow and directs the gas to a number of gas injectors, preferably two to four injectors within the main process tube. Gas injection orifices on the order of several millimeters then distribute the pre-decomposed gas to the wafers, producing a more uniformly N-doped wafer load in a batch furnace.

Growing community of inventors

Cortlandt Manor, NY, United States of America

Douglas Andrew Buchanan