Nvidia Corporation

Silicon Graphics, Incorporated

Nvida Corporation

Douglas A Voorhies

John Stephen Montrym

Nicholas J Foskett

Paolo Enrique Sabella

Matthew Nicholas Papakipos

David B Kirk

John Erik Lindholm

Simon S Moy

Kevin Dawallu

Mingjian Yang

Steven E Molnar

James M Van Dyke

John M Danskin

Franklin C Crow

Svetoslav D Tzvetkov

Edward Colton Greene

David Patrick Luebke

Emmett Michael Kilgariff

Walter Robert Steiner

Craig Michael Wittenbrink

Jonathan Bakdash

Qi Mo

Henry Packard Moreton

Mark J Kilgard

Edward Anthony Hutchins

Cass Watson Everitt

Mark Stefan Grossman

Vimal S Parikh

Justin S Legakis

Roger L Allen

Mark J French

James L Foran

James E Margeson, Iii

Adam Clark Weitkemper

Matthew J Craighead

David Lloyd Morgan

Jim E Margeson, Iii

In a raster stage of a graphics pipeline, a method for rasterizing non-rectangular tile groups. The method includes receiving a graphics primitive for rasterization in a raster stage of a graphics processor. The graphics primitive is rasterized at a first level by generating a non-rectangular footprint comprising a set of pixels related to the graphics primitive. The graphics primitive is then rasterized at a second level by accessing the set of pixels and determining covered pixels out of the set of pixels. The raster stage subsequently outputs the covered pixels for rendering operations in a subsequent stage of the graphics processor.

Method for rasterizing non-rectangular tile groups in a raster stage of a graphics pipeline

One embodiment of the invention sets forth a mechanism for interleaving consecutive display frames rendered at complementary reduced resolutions. The GPU driver configures a command stream associated with a frame received from a graphics application for reduced frame rendering. The command stream specifies a nominal resolution at which the frame should be rendered. The reduced resolution associated with the frame is determined based on the reduced resolution of an immediately preceding frame (i.e., the complementary reduced resolution), if one exists, or on GPU configuration information. The GPU driver then modifies the command stream to specify the reduced resolution. The GPU driver also inserts an upscale command sequence specifying the nominal resolution into the command stream. Once the command stream is configured in such a manner, the GPU driver transmits the command stream to the GPU for reduced rendering.

Accelerated rendering with temporally interleaved details

One embodiment of the present invention sets forth an architecture for advancing the Z-test operation prior to pixel shading whenever possible. The current rendering state, as maintained by the setup engine, determines whether advancing the Z-test function above the shader engine for 'early' Z-testing is possible or whether the Z-test function should be deferred until after shading operations for 'late' Z-testing. Data is dynamically routed to each processing engine in the pipeline, so that the appropriate data flow for either early Z or late Z is dynamically constructed, as determined by the current rendering state. The same functional units are utilized in both early Z and late Z configurations.

Optimizing a graphics rendering pipeline using early Z-mode

In a raster stage of a graphics processor, a method for parallel fine rasterization. The method includes receiving a graphics primitive for rasterization in a raster stage of a graphics processor. The graphics primitive is rasterized at a first level to generate a plurality of tiles of pixels. The titles are subsequently rasterized at a second level by allocating the tiles to an array of parallel second-level rasterization units to generate covered pixels. The covered pixels are then output for rendering operations in a subsequent stage of the graphics processor.

Method for parallel fine rasterization in a raster stage of a graphics pipeline

The range of depth values within the overlap of a convex polygon and a square or rectangular rasterization area can be determined by identifying whether the minimum and maximum depth values occur at the corners of the rasterization area or at intersections of the polygon's edges with the area's sides. By choosing between the corner and intersection for both the minimum and maximum depth limit, solving the depth plane equation at the chosen location, and clamping against the polygon's vertex depth range, a tight depth range describing the depth values within that overlap are obtained. That tight depth range is utilized to cull pixel values early in the pipeline, improving performance and power consumption.

Tight depth range occlusion prediction system and method

A method and system are disclosed for antialiased rendering a plurality of pixels in a computer system. The method and system comprise providing a fixed storage area and providing a plurality of sequential format levels for the plurality of pixels within the fixed storage area. The plurality of format levels represent pixels with varying degrees of complexity in subpixel geometry visible within the pixel. A system and method in accordance with the present invention provides at least the following format levels: one-fragment format, used when one surface fully covers a pixel; two-fragment format, used when two surfaces together cover a pixel; and multisample format, used when three or more surfaces cover a pixel. The method and system further comprise storing the plurality of pixels at a lowest appropriate format level within the fixed storage area, so that a minimum amount of data is transferred to and from the fixed storage area. The method and system further comprise procedures for converting pixels from one format level to take into account newly rendered pixel fragments. All formats represent depth values in a consistent manner so that fragments rendered during later rendering passes match depth values resulting from rendering the same primitive in earlier passes. Thus, the invention enables high-quality antialiasing with minimal data transferred to and from the fixed storage area, while supporting multi-pass rendering.

Method and system for efficient antialiased rendering

An occlusion prediction graphics processing system and method are presented in accordance with embodiments of the present invention. An occlusion prediction graphics processing method is utilized to predict which pixel values are eventually occluded before intermediate processing stages are performed on the pixel values. For example, occlusion results are predicted before the occlusion stage of a graphics pipeline. The occlusion prediction results are based upon an occlusion value received from later in a graphics processing pipeline (e.g., a raster operation stage). A convex polygonal prediction area can be established and a nearest vertex of the convex polygonal prediction area is selected for prediction analysis. Pixel values are removed or discarded from the pipeline based upon the occlusion prediction results and do not unnecessarily occupy processing resources. Removal of the pixel values from the pipeline includes pixels values associated with pixels in the convex polygonal prediction area. Pixel shading is performed on the remaining pixels.

Occlusion prediction graphics processing system and method

An occlusion prediction compressing system and method are presented in accordance with embodiments of the present invention. In one embodiment, an occlusion prediction graphics processing method is utilized to predict which pixels are eventually occluded before intermediate processing stages are performed on the pixels. Culling information utilized to predict which pixel are occluded is compressed in accordance with embodiments of the present invention. In one embodiment, a cull value for a pixel culling area is retrieved and an end of pipe depth value associated with a prediction area within the pixel culling area is received. A determination is made if the end of pipe depth value is within a threshold range of the cull value. The cull value is updated based upon the relationship of the end of pipe depth value to offsets from the cull value. The cull value is associated with a mask which indicates if a plurality of prediction areas are at or in front of the cull value.

Occlusion prediction compression system and method

A culling data selection system and method are presented in accordance with embodiments of the present invention. In one embodiment, an occlusion prediction graphics processing method is utilized to predict which pixels are eventually occluded before intermediate processing stages are performed on the pixels. Culling information utilized to predict which pixel are occluded is selected and compressed in accordance with embodiments of the present invention. In one embodiment, cull data for a pixel culling area is retrieved and an end of pipe depth occlusion data associated with a prediction area within the pixel culling area is received. A selection metric for analyzing adjustments to cull data is established and a cull data adjustment decision is made based upon the selection metric. In one exemplary implementation the possible occlusion volumes associated with 'old' culling data, 'new' culling data (e.g., based upon an occlusion value received from a stage later in a graphics processing pipeline) and &#x201c;merged&#x201d; culling data are determined. The culling data associated with the greatest volume is selected for culling operations.

Culling data selection system and method

Stippled lines are drawn by evaluating a distance function for a set of points within the area of a stippled line. The distance function gives a distance value proportional to the distance from a point to the end of the stippled line. Using the point's distance value, a pattern index value defines a correspondence between a point and at least one stipple pattern bit. The value of pattern bits are applied to the points on the stippled line, masking the points such that only a portion of the set of points are displayed or determining intensity values according to the position of the points within the stipple pattern. A distance function may be an edge equation associated with the line end or a segment of a polyline. The distance function can be evaluated for the set of points in any order, allowing portions of a stippled line to be drawn in parallel.

Stippled lines using direct distance evaluation

Clipping techniques introduce additional vertices into existing primitives without requiring creation of new primitives. For an input triangle with one vertex on the invisible side of a clipping surface, a quadrangle can be defined. The vertices of the quadrangle are the two internal vertices of the input triangle and two clipped vertices. For determining attribute values for pixel shading, three vertices of the quadrangle are selected, and a parameter value for an attribute equation is computed using the three selected vertices. For determining pixel coverage for the quadrangle, the three edges that do not correspond to the edge created by clipping are used.

Clipping with addition of vertices to existing primitives

A system and method are provided for conditional branching in a hardware graphics pipeline. Initially, a plurality of graphics commands is received. Condition data is then affected based on at least some of the graphics commands utilizing the hardware graphics pipeline. At least one of the graphics commands is then conditionally skipping based on the condition data in response to another graphics command utilizing the hardware graphics pipeline.

System and method for display list occlusion branching

A system, method and article of manufacture are provided for early Z-value based culling prior to pixel rendering in a graphics pipeline. In initial stages of processing, Z-value culling is performed on at least one pixel. Thereafter, the pixel is conditionally rendered. Whether the pixel is rendered or not is conditioned on results of the Z-value culling. By culling, or removing, the pixels that do not meet certain criteria prior to rendering, much processing is avoided in the rendering portion of the graphics pipeline.

System, method and article of manufacture for Z-value and stencil culling prior to rendering in a computer graphics processing pipeline

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Menlo Park, CA, United States of America

Douglas A Voorhies