Agency for Science, Technology and Research

Institute of Materials Research and Engineering

Dongzhi Chi

Shijie Wang

Jianwei Chai

Syamal Kumar Lahiri

Ming Yang

Shi Wun Tong

Dominique Mangelinck

Henry Medina Silva

Soo Jin Chua

Kwok Wei Shah

Ming-Yong Han

Andy Hor

Shuang-Yuan Zhang

Yee Fun Lim

Swee Liang Wong

Carlos Manzano

Si Yin Tee

Tek Po Rinus

Chin Sheng Chua

A method for forming a transition metal dichalcogenide monolayer, which includes depositing a transition metal, a transition metal oxide, or a mixture thereof, on a substrate, introducing a chalcogen precursor to the transition metal, the transition metal oxide, or the mixture thereof, in the presence of an etching gas and a carrier gas at a first temperature, to form a transition metal dichalcogenide on the substrate from the transition metal, the transition metal oxide, or the mixture thereof, and subliming the transition metal dichalcogenide on the substrate in the presence of a pulsating supply of a vapor of the chalcogen precursor to form the transition metal dichalcogenide monolayer at a second temperature, wherein the vapor of the chalcogen precursor comprises a chalcogen vapor.

Method of growing monolayer transition metal dichalcogenides via sulfurization and subsequent sublimation

Herein provided is a multilayered structure including one or more nanocrystalline layers each comprising a transition metal dichalcogenide, one or more substantially amorphous electrically insulating layers each comprising a transition metal oxide, wherein the transition metal oxide comprises a transition metal which is identical to the transition metal of the transition metal dichalcogenide, wherein the one or more nanocrystalline layers and the one or more substantially amorphous electrically insulating layers are formed in an alternating manner, and wherein each of the one or more nanocrystalline layers is formed adjacent to the substantially amorphous insulating layer. A resistive memory device comprising the multilayered structure and a process of fabricating the multilayered structure are also disclosed herein.

Resistive memory device structure based on stacked layers of nanocrystalline TMDCs

A method of forming a transition metal dichalcogenide layer on a substrate is provided. The method may include providing a transition metal oxide, a chalcogen source, a non-gaseous chalcogen scavenger, and a substrate, wherein the substrate is disposed downstream of the transition metal oxide and the chalcogen source, and wherein the non-gaseous chalcogen scavenger is disposed in proximity to the transition metal oxide; generating vapors of the transition metal oxide and vapors of the chalcogen source, wherein the non-gaseous chalcogen scavenger reacts preferentially with the vapors of the chalcogen source; disposing the vapors generated from the transition metal oxide and the chalcogen source on the substrate; and reacting the vapors of the transition metal oxide and the chalcogen source on the substrate to obtain the transition metal dichalcogenide layer on the substrate. In one embodiment, the transition metal oxide is molybdenum trioxide (MoO), the chalcogen source is sulfur, the non-gaseous chalcogen scavenger is nickel and the transition metal dichalcogenide is molybdenum disulfide (MoS). An arrangement for forming a transition metal dichalcogenide layer on a substrate is also provided.

Method and arrangement for forming a transition metal dichalcogenide layer

A sputtering system and a sputtering method are provided. The sputtering system includes a first electrode, a magnet and a second electrode. The first electrode is an elongated tube having a first end and a second end downstream of the first end. The first end is configured to receive a gas flow and the second end is placed next to a substrate. The magnet surrounds at least a portion of the elongated tube and is configured to generate a magnetic field in a space within the elongated tube. The second electrode is disposed within the elongated tube. A voltage is configured to be applied between the first and second electrodes to generate an electric field between the first and second electrodes.

Sputtering system and method

There is provided a method of preparing transition metal phosphide comprising the step of mixing a solution of a transition metal precursor and a phosphorous precursor under conditions to form the transition metal phosphide. There is also provided a transition metal phosphide particle made according to the method as defined herein. There is additionally provided a method of preparing a transition metal phosphide-based electrode used for producing hydrogen in the electrolysis of water.

Method for preparing transition metal phosphide

A method of fabricating a gate electrode for a semiconductor comprising the steps of: providing a substrate; providing on the substrate a layer of a first material of thickness t, the first material being selected from the group consisting of Si, Si&#x2014;Gealloy, Ge and mixtures thereof and a layer of metal of thickness t; and annealing the layers, such that substantially all of the first material and the metal are consumed during reaction with one another.

Gate electrodes and the formation thereof

A NiSi layer over silicon that is thermally stable and can form even in the presence of oxides. The method of fabricating the nickel silicide layer includes providing a substrate comprising silicon, depositing a layer of at least a 3-component metal alloy comprising nickel on a surface of the substrate, and annealing the alloy and the substrate. The annealing temperature is less than 1000&#xb0; C. The 3-component metal alloy can include Ni, Ti and Pt.

Silicide formed from ternary metal alloy films

A method of fabricating a silicide layer on a silicon region of a semiconductor structure, the method comprising the steps of: providing a semiconductor structure having at least one silicon region on a surface thereof; depositing a layer comprising nickel and platinum on the at least one silicon layer; annealing the semiconductor structure and the nickel/platinum layer to react the nickel and the platinum with underlying silicon to form a nickel-platinum silicide, wherein annealing step takes place at temperature of between 680&deg; C. and 720&deg; C.

Growing community of inventors

Singapore, Singapore

Dongzhi Chi