Qualcomm Incorporated

Dongyang Tang

Vijayakumar Dhanasekaran

Xinwang Zhang

Chien-Chung Yang

Sherif Galal

Arash Mehrabi

Khaled Mahmoud Abdelfattah Aly

Ramkumar Sivakumar

Pradeep Charles Silva

ChienChung Yang

Zongyu Dong

Subbarao Surendra Chakkirala

Earl Schreyer

Qubo Zhou

Hanil Lee

Chaoli Zhong

A transmission line includes an equalization circuit. The equalization circuit is a second-order equalization circuit having a first loop at a gain element and a second loop at the gain element. The first loop may include a first compensation capacitor, and the second loop may include a second compensation capacitor and a resistor. The second order equalization circuit may allow for improved performance with respect to gain as well as reduced power usage.

Second-order equalizer for high-speed data lines

An apparatus is disclosed for reducing resistor conductivity modulation during amplification. In an example aspect, the apparatus includes a power amplifier circuit comprising a first pair of resistors, a digital-to-analog converter comprising a second pair of resistors, a reference generation circuit comprising a third pair of resistors, and a scaling circuit. The scaling circuit is configured to accept a common-mode reference voltage and a common-mode output voltage. The scaling circuit is also configured to provide a first voltage at body terminals of the first pair of resistors, a second voltage at body terminals of the second pair of resistors, and a third voltage at body terminals of the third pair of resistors such that a summation of the first voltage and the third voltage reduced by the second voltage is approximately equal to an average of the common-mode reference voltage and the common-mode output voltage.

Reducing resistor conductivity modulation during amplification

Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.

Dynamic common-mode adjustment for power amplifiers

A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.

Class-D amplifier with deadtime distortion compensation

A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the 'click and pop' sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.

Audio power amplifier for reduced click and pop (CnP)

A digital-to-analog converter has both a plurality of DAC stages and a plurality of dummy stages. Each DAC stage causes a glitch or disturbance to a pair of reference voltages when the DAC stage changes its switching state. Each dummy stage also causes a similar glitch or disturbance to the pair of reference voltages when the dummy stage changes its switching state. The dummy stages are controlled to change their switching state responsive to how many DAC stages change their switching state such that a total glitch induced onto the reference voltages remains substantially constant across a succession of digital words converted by the digital-to-analog converter into an analog output signal.

Digital-to-analog converter with glitch-irrelevant reference voltage to increase linearity

An apparatus includes a reference voltage circuit having a bandgap input and a reference voltage output. The apparatus also includes a digital-to-analog converter (DAC) coupled to the reference voltage output and having a digital signal input. The apparatus includes an amplifier having a first input coupled to an output of the DAC. The first input is coupled to an output of the amplifier via a feedback resistor. The apparatus includes a resistor coupled to the reference voltage output and having a body terminal coupled to the output of the amplifier.

Amplifier with nonlinearity compensation

An apparatus includes an amplifier having a first input and a second input. A first feedback resistor is coupled to the first input and has a first body terminal coupled to a first bias terminal. A second feedback resistor is coupled to the second input and has a second body terminal coupled to a second bias terminal.

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Dongyang Tang