Kla Tencor Corporation

Dongsub Choi

Amnon Manassen

Ady Levy

Amir Widmann

Pavel Izikson

Mike Adel

Daniel Kandel

Liran Yerushalmi

John Charles Robinson

Frank Laske

Zain Saidin

Pradeep Subrahmanyan

David Tien

William Pierson

Dror Alumot

Anat Marchelli

Hoyoung Heo

John Robinson

Michael A Adel

Various methods and systems for creating or performing a dynamic sampling scheme for a process during which measurements are performed on wafers are provided. One method for creating a dynamic sampling scheme for a process during which measurements are performed on wafers includes performing the measurements on all of the wafers in at least one lot at all measurement spots on the wafers. The method also includes determining an optimal sampling scheme, an enhanced sampling scheme, a reduced sampling scheme, and thresholds for the dynamic sampling scheme for the process based on results of the measurements. The thresholds correspond to values of the measurements at which the optimal sampling scheme, the enhanced sampling scheme, and the reduced sampling scheme are to be used for the process.

Methods and systems for creating or performing a dynamic sampling scheme for a process during which measurements are performed on wafers

Various methods and systems for creating or performing a dynamic sampling scheme for a process during which measurements are performed on wafers are provided. One method for creating a dynamic sampling scheme for a process during which measurements are performed on wafers includes performing the measurements on all of the wafers in at least one tot at all measurement spots on the wafers. The method also includes determining an optimal sampling scheme, an enhanced sampling scheme, a reduced sampling scheme, and thresholds for the dynamic sampling scheme for the process based on results of the measurements. The thresholds correspond to values of the measurements at which the optimal sampling scheme, the enhanced sampling scheme, and the reduced sampling scheme are to be used for the process.

A combined metrology mark, a system, and a method for calculating alignment on a semiconductor circuit are disclosed. The combined metrology mark may include a mask misregistration structure and a wafer overlay mark structure.

Unique mark and method to determine critical dimension uniformity and registration of reticles combined with wafer overlay capability

A method for automatic process control (APC) performance monitoring may include, but is not limited to: computing one or more APC performance indicators for one or more production lots of semiconductor devices; and displaying a mapping of the one or more APC performance indicators to the one or more production lots of semiconductor devices.

Advanced process control optimization

Growing community of inventors

Sungnam, South Korea

Dongsub Choi