Silicon Storage Technology, Inc.

Other

Greenliant LLC

Dongsheng Xing

Frank (Fong-Long) Lin

Siamak Arya

Frank Fong-Long Lin

Simpson (ShinChu) Tao

A method of operating a controller for controlling the programming of a NAND memory chip is shown. The NAND memory chip has a plurality of blocks with each block having a certain amount of storage, wherein the amount of storage in each block is the minimum erasable unit. The method comprising storing in a temporary storage a first plurality of groups of data, wherein each of the groups of data is to be stored in a block of the NAND memory chip. Each group of data is indexed to the block with which it is to be stored. Finally, the groups of data associated with the same block are programmed into the same block in the same programming operation.

Method of writing to a NAND memory block based file system with log based buffering

A memory system, an interface system for accessing a physical sector on an electrically erasable media based upon a logical block number, and a method for mapping a logical block number to a physical sector on an electrically erasable media are disclosed. The erasable media has an erase block size larger than a write block size. The interface system interfaces a host processor to an electrically-erasable memory, such as a flash media. The host processor requests access to the memory based on a logical block number. The interface system uses a first portion of the logical block number to determine from a master index table a physical sector number of a table of physical sector numbers corresponding to the logical block number. The interface system uses a second portion of the logical block number to determine from the table of physical sector numbers the physical sector number on the media corresponding to the logical block number. The host processor is provided access to the physical sector having the physical sector number corresponding to the logical block number. A logical block number may be remapped to a physical sector that has been completely erased by updating the table of physical sector numbers corresponding to the logical block number. A plurality of physical sectors, which are marked as discarded are erased simultaneously.

Memory, interface system and method for mapping logical block numbers to physical sector numbers in a flash memory, using a master index table and a table of physical sector numbers

A circuit interfaces a host processor to an electrically-erasable memory in a memory space, such as a flash media. The memory space defines a plurality of segments, and each of the segments includes a plurality of sectors. A media interface circuit regulates access by the host processor to the electrically-erasable memory in the memory space. Sector valid indication reading circuitry reads at least one sector valid indication from a segment of the media. Sector valid determination circuitry determines a non-defective sector from the at least one sector valid indication read. Sector level segment defect map indication reading circuitry reads a sector-level segment defect map from the sector determined to be non-defective. Sector defect determination circuitry determines, from the sector-level segment defect map read, sectors within the segment that are valid. Access regulation circuitry regulates access to the memory space at least in part on the determinations by the sector defect determination circuitry.

Defect management for interface to electrically-erasable programmable read-only memory

In a non-volatile memory array where the memory cells in a sector are programmed together and a plurality of sectors form a segment which are erased together, through the use of a free list linking entries in a register with each entry in a register corresponding to a free segment, a free list table is created which readily simplifies searches for segments that are available for erasure. In addition, through the creation of a segment number table and a count index, determination of particular valid sectors in particular segments can be readily identified.

Non-volatile memory array having an index used in programming and erasing

A non-volatile memory device has a plurality of blocks each of which can be erased simultaneously. Each block has a plurality of sectors. A status byte comprising of non-volatile memory cells is associated with each sector. A status circuit receives signals stored in each of the status bytes and generates a status signal indicative of the status of the block.

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Fremont, CA, United States of America

Dongsheng Xing