Samsung Electronics Co., Ltd.

Sungkyunkwan University

Donghun Lee

Young-Soo Sohn

Kyung-Soo Ha

Ki-Seok Oh

Changkyo Lee

Young-Hoon Son

Hyun-Yoon Cho

Minwoo Ryu

Daesik Moon

Seokhun Hyun

Seho Myung

Dongwon Kim

Shin Hyoung Kim

Mirco Cantoro

Junggun You

Sungil Park

Taeyong Kwon

Kwonjong Lee

Jinhee Kim

Yunil Lee

Changhee Kim

Changho Ha

Jaeyoon Jeong

Juho Lee

Minchul Kim

Jaewon Lee

Jinbum Kim

Min Jung Jang

Sang-Hyo Kim

Hyesung Kim

Bonyoung Koo

Hoon Shung Lee

Jisang Park

Min Jun Jang

Kwan Heum Lee

Choeun Lee

Soo-Young Ji

Moonsang Kwon

Jeongho Yoo

Jaeyoung Park

Hyosang Ju

Kihan Kim

Jeayun So

Isaac Baek

Kiho Kim

Jieon Yoon

HyungJin Im

Jooseok Jeong

Donghwa Han

The disclosure relates to fifth generation (5G) or sixth generation (6G) communication systems to support higher data rates. A receiver of a communication system includes a transceiver configured to receive a signal encoded based on polarization-adjusted convolutional (PAC) coding from a transmitter, and a controller configured to calculate branch metrics of branches defined in a trellis associated with the PAC, calculate a path metric based on an accumulated sum of the branch metrics, determine a path assigned to each state based on the path metric, and estimate a codeword based on the determined path, wherein a number of paths assigned to each state is dynamically determined according to the number of active states, and wherein the active state includes at least one branch.

Method and apparatus for decoding polarization-adjusted convolutional code by using list Viterbi algorithm adjusting list size dynamically

A 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data rate than a beyond 4th generation (4G) communication system, such as long-term evolution (LTE) is provided. An electronic device performs interleaving on codeword bits, according to a polar code sequence corresponding to the codeword bits, allocates the interleaved codeword bits respectively to blocks, and transmits at least one symbol generated as a result of performing modulation on the interleaved codeword bits for each block, based on the allocation, on at least one resource block corresponding to each of the blocks.

Method and apparatus for transmitting and receiving polar code

A memory device includes a driver that drives a data line connected with an external device, an internal ZQ manager that generates an internal ZQ start signal, a selector that selects one of the internal ZQ start signal and a ZQ start command from the external device, based on a ZQ mode, a ZQ calibration engine that generates a ZQ code by performing ZQ calibration in response to a selection result of the selector, and a ZQ code register that loads the ZQ code onto the driver in response to a ZQ calibration command from the external device.

Memory device, memory system, and operation method of memory device

A cleaning robot is provided. The cleaning robot includes a body, a light detection and ranging (LiDAR) module having a LiDAR sensor rotatably supported by the body, a light-emitting display module mounted on the LiDAR module, wherein the light-emitting display module is configured to display an image based on an afterimage effect according to a rotation of the LiDAR module.

Cleaning robot

Disclosed are a memory device that performs offset calibration and a method of operating the memory device. The memory device includes an input/output pad configured to receive data from a device external, an on-die termination (ODT) circuit connected to the input/output pad, a plurality of receivers connected to the ODT circuit and configured to receive the data from the input/output pad, an offset calibration circuit configured to perform an offset calibration operation on data output from the plurality of receivers and output an offset correction, a first switch configured to provide a first voltage to the plurality of receivers, and a second switch configured to provide a second voltage to the plurality of receivers. During the offset calibration operation, the plurality of receivers receive a third voltage in response to the ODT circuit being enabled and the first voltage through the first switch.

Memory device performing offset calibration and operating method thereof

A cleaning robot and a method of controlling the same, the cleaning robot performing docking by detecting light emitted from a docking station using a Lidar sensor or a light receiving element separately provided on a printed circuit board (PCB) of the Lidar sensor, and performing docking based on the number of light emitting elements of the docking station identified according to the detected light are provided. The cleaning robot includes a main body, a drive unit configured to move the main body, a Lidar sensor including a Lidar optical transmitter, a Lidar optical receiver, and the PCB to which the Lidar optical transmitter and the Lidar optical receiver are fixed and provided to be rotatable, a docking optical receiver fixed to the PCB and configured to receive light emitted from the docking optical transmitter of the docking station, and at least one processor is configured to control the drive unit to be docked on the docking station based on light received by the docking optical receiver.

Cleaning robot and controlling method thereof

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate than 4G communication systems such as LTE systems. The disclosure relates to a method and device for dynamically selecting, or simultaneously performing, PAC code-based Fano decoding and/or list decoding in a wireless communication system. The method for performing PAC code-based decoding by a reception device in a wireless communication system comprises identifying a specific criterion variable related to a channel state for selecting at least one of Fano decoding or list decoding for a signal received from a transmission device, comparing the specific criterion variable related to the channel state with a threshold, performing the Fano decoding in case that the specific criterion variable related to the channel state satisfies the threshold, and performing the list decoding in case that the specific criterion variable related to the channel state does not satisfy the threshold.

Method and device for performing PAC code-based hybrid decoding in wireless communication system

A robot cleaner is provided. The robot cleaner includes a three-dimensional image sensor, an optical sensor, a gyro sensor, and at least one processor configured to control a driving state of the robot cleaner based on image data acquired by the three-dimensional image sensor, optical data acquired by the optical sensor, and angular velocity data acquired by the gyro sensor, wherein the three-dimensional image sensor and the optical sensor are respectively arranged to be tilted by a predetermined tilting angle, and a tilting angle of the three-dimensional image sensor is smaller than a tilting angle of the optical sensor.

Robot cleaner and controlling method thereof

An SRAM device includes first, second and third transistors, which are used as a pass gate transistor, a pull-down transistor, and a pull-up transistor, respectively. A channel region of each transistor may include a plurality of semiconductor sheets that are vertically stacked on a substrate. The semiconductor sheets used as the channel regions of the first and second transistors may have a width greater than the semiconductor sheets used as channel regions of the third transistor.

SRAM device provided with a plurality of sheets serving as a channel region

Memory device performing ZQ calibration, memory system, and operation method of memory device

A semiconductor device includes an active pillar on a substrate. A first source/drain region is disposed at a top end of the active pillar and has a greater width than the active pillar. A first insulating layer is disposed on a sidewall of the active pillar and a second insulating layer is disposed on at least a bottom surface of the first source/drain region. A gate electrode is disposed on the first insulating layer and the second insulating layer. A second source/drain region is disposed in the substrate at a bottom end of the active pillar. Methods of fabrication are also described.

Semiconductor devices having vertical transistors with aligned gate electrodes

A delay locked loop includes a delay line, a delay circuit, a phase detector, a delay code generator, and a delay controller. The delay line may delay an input clock signal in units of unit delay in response to a delay control code to generate an output clock signal. The delay circuit may delay the output clock signal to generate a delay clock signal. The phase detector may compare the input clock signal and the delay clock signal to generate a phase detection signal. The delay code generator may compare the input clock signal and the delay clock signal to detect a phase difference therebetween, and generate a delay code using the phase difference. The delay controller may generate the delay control code using the delay code and the phase detection signal.

Delay locked loop including a delay code generator

Growing community of inventors

Anyang-si, South Korea

Donghun Lee