Samsung Electronics Co., Ltd.

Sejong University

Dongho Ahn

Changseung Lee

Kiyeon Yang

Jinwoo Lee

Changyup Park

Chungman Kim

Bonwon Koo

Zhe Wu

Hajun Sung

Young-Lim Park

Wooyoung Yang

Kwangmin Park

Jeonghee Park

Gyuhwan Oh

Minwoo Choi

Hyunjae Song

Yumin Kim

Myunghun Woo

Soonoh Park

Jooheon Kang

Yongyoung Park

Wonjun Park

Donggeon Gu

Garam Park

Seyun Kim

Dong-Hyun Im

Sunho Kim

Ja Bin Lee

Eun-Hee Cho

Jinil Lee

Seunggeun Yu

Segab Kwon

Seungyeul Yang

Wonjun Lee

Won-Jun Lee

Doyoon Kim

Sihyung Lee

Heeju Shin

Jiho Park

Young Jae Kang

Chang Seung Lee

Youngjae Kang

Seung-Geun Yu

Jabin Lee

Gwangguk An

Kwonyoung Kim

Suseong Noh

Yewon Kim

Okhyeon Kim

Park Garam

Provided area a variable resistance memory device and/or an electronic device including the same. The variable resistance memory device includes: a resistance change layer including a metal oxide having an oxygen deficient ratio greater than or equal to about 9%; a semiconductor layer on the resistance change layer; a gate insulating layer on the semiconductor layer; and a plurality of electrodes on the gate insulating layer to be apart from each other.

Variable resistance memory device and electronic device including the same

A phase-change memory structure includes lower and upper electrodes spaced apart from each other, and a phase-change material stack between the lower and upper electrodes. The phase-change material stack includes a plurality of phase-change layers, at least two phase-change layers of the plurality of phase-change layers have different phase-change temperatures, and a plurality of barrier layers between the plurality of phase-change layers The at least two phase-change layers of the plurality of phase-change layers have different thicknesses.

Phase-change memory structure and phase-change memory device including the same

Provided are a nonvolatile memory device and an operating method thereof. The nonvolatile memory device may include a conductive pillar, a resistance change layer surrounding a side surface of the conductive pillar, a semiconductor layer surrounding a side surface of the resistance change layer, a gate insulating layer surrounding a side surface of the semiconductor layer, and a plurality of insulating patterns and a plurality of gate electrodes alternately arranged along a surface of the gate insulating layer. The plurality of insulating patterns and the plurality of gate electrodes may surround a side surface of the gate insulating layer.

Nonvolatile memory device and operating method of the same

A method of forming a germanium antimony tellurium (GeSbTe) layer includes forming a germanium antimony (GeSb) layer by repeatedly performing a GeSb supercycle; and forming the GeSbTe layer by performing a tellurization operation on the GeSb layer, wherein the GeSb supercycle includes performing at least one GeSb cycle; and performing at least one Sb cycle, the GeSbTe has a composition of GeSbTe, in which a and b satisfy the following relations: −0.2<a<0.2 and −0.5<b<0.5.

Method of forming germanium antimony tellurium film

A semiconductor device includes a lower structure, a stack structure including gate layers and interlayer insulating layers alternately stacked on the lower structure in a first direction, and a channel structure in a channel hole passing through the stack structure. The channel structure includes a variable resistance material layer in the channel hole, a data storage material layer between the variable resistance material layer and a sidewall of the channel hole, and a channel layer between the data storage material layer and the sidewall of the channel hole, the channel layer includes a first element, the variable resistance material layer includes a second element, different from the first element, oxygen, and oxygen vacancies, and the data storage material layer includes the first element, the second element, oxygen, and oxygen vacancies.

Semiconductor devices and data storage systems including the same

Provided are a switching device and a memory device including the switching device. The switching device includes first and second electrodes, and a switching material layer provided between the first and second electrodes and including a chalcogenide. The switching material layer includes a core portion and a shell portion covering a side surface of the core portion. The switching layer includes a material having an electrical resistance greater than an electrical resistance of the core portion, for example in at least one of the core portion or the shell portion.

Switching device and memory device including the same

A memory device including a phase-change material includes: a substrate; a first memory cell including a first selection layer and a first phase-change material layer, and a second memory cell including a second selection layer and a second phase-change material layer, wherein the first memory cell and the second memory cell are arranged apart from each other with an insulating layer therebetween in a normal direction of the substrate, wherein the first phase-change material layer and the second phase-change material layer include: a first layer including a thermal confinement material; and a second layer including a phase-change material, respectively, wherein the first layer and the second layer extend in a direction vertical to the substrate, and wherein the first phase-change material layer is physically isolated from the second phase-change material layer by the insulating layer.

Memory device including phase-change material

A semiconductor device includes gate electrodes on a substrate, a channel and a resistance pattern. The gate electrodes are spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate. The channel extends through the gate electrodes in the vertical direction on the substrate. The resistance pattern includes a phase-changeable material. The resistance pattern includes a first vertical extension portion on a sidewall of the channel and extending in the vertical direction, a first protrusion portion on an inner sidewall of the first vertical extension portion and protruding in a horizontal direction substantially parallel to the upper surface of the substrate, and a second protrusion portion on an outer sidewall of the first vertical extension portion and protruding in the horizontal direction and not overlapping the first protrusion portion in the horizontal direction.

Semiconductor devices

A resistive memory device including a resistive memory pattern; and a selection element pattern electrically connected to the resistive memory pattern, the selection element pattern including a chalcogenide switching material and at least one metallic material, the chalcogenide switching material including germanium, arsenic, and selenium, and the at least one metallic material including aluminum, strontium, or indium, wherein the selection element pattern includes an inhomogeneous material layer in which content of the at least one metallic material in the selection element pattern is variable according to a position within the selection element pattern.

Resistive memory device

A semiconductor apparatus may include a plurality of semiconductor unit devices. Each of the semiconductor unit devices may be arranged between a first insulating layer and a second insulating layer that are apart from each other in a direction normal to a substrate. Each of the semiconductor unit devices may include a selection device layer and a phase change material layer that extend side by side in a direction parallel to the substrate. The phase change material layer may have a superlattice-like structure. The phase change material layer may be arranged along a recess portion that is formed by the first insulating layer, the second insulating layer, and the selection device layer.

Semiconductor apparatus

A memory device includes a memory cell including a selection layer and a phase change material layer, and a controller, wherein the selection layer includes a switching material, the phase change material layer includes a phase change material, and the controller is configured to apply a write pulse to the selection layer and the phase change material layer and control a polarity, a peak value, and a shape of the write pulse.

Memory device including switching material and phase change material

A semiconductor device includes a first conductive line on a lower structure and extending in a first horizontal direction; a second conductive line on the first conductive line and extending in a second horizontal direction, the second horizontal direction being perpendicular to the first horizontal direction; and a memory cell structure between the first conductive line and the second conductive line. The memory cell may structure include a data storage material pattern and a selector material pattern overlapping the data storage material pattern in a vertical direction. The data storage material pattern may include a phase change material layer of InGeSbTe. In the phase change material layer of InGeSbTe, a sum of α and β may be lower than about 30 at. %, and a sum of γ and δ may be higher than about 70 at. %.

Semiconductor device including data storage material pattern

A variable resistance memory device includes a first conductive line extending on a substrate in a first horizontal direction; a second conductive line extending on the first conductive line in a second horizontal direction perpendicular to the first horizontal direction; and a memory cell at an intersection between the first conductive line and the second conductive line, the memory cell including a selection element and a variable resistor, wherein the variable resistor includes a first variable resistance layer having a senary component represented by CGeSbTeAX, in which A and X are each a group 13 element different from each other, and 1≤a≤18, 13≤b≤26, 15≤c≤30, 35≤d≤55, 0.1≤e≤8, 0.1≤f≤8, and a+b+c+d+e+f=100.

Variable resistance memory device

A chalcogen compound layer exhibiting ovonic threshold switching characteristics, a switching device, a semiconductor device, and/or a semiconductor apparatus including the same are provided. The switching device and/or the semiconductor device may include two or more chalcogen compound layers having different energy band gaps. Alternatively, the switching device and/or semiconductor device may include a chalcogen compound layer having a concentration gradient of an element of boron (B), aluminum (Al), scandium (Sc), manganese (Mn), strontium (Sr), and/or indium (In) in a thickness direction thereof. The switching device and/or a semiconductor device may exhibit stable switching characteristics while having a low off-current value (leakage current value).

Semiconductor device including chalcogen compound and semiconductor apparatus including the same

Provided are a chalcogen compound having ovonic threshold switching characteristics, and a switching device, a semiconductor device, and/or a semiconductor apparatus which include the chalcogen compound. The chalcogen compound includes five or more elements and may have stable switching characteristics with a low off-current value (leakage current value). The chalcogen compound includes: selenium (Se) and tellurium (Te); a first element comprising at least one of indium (In), aluminum (Al), strontium (Sr), and calcium (Ca); and a second element including germanium (Ge) and/or tin (Sn), and may further include at least one of arsenic (As), antimony (Sb), and bismuth (Bi).

Chalcogen compound and semiconductor device including the same

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Hwaseong-si, South Korea

Dongho Ahn