Samsung Electronics Co., Ltd.

Dongchan Lim

JaeWha Park

Janghee Lee

Sukhoon Kim

Heesook Park

Geumjung Seong

Byunghak Lee

Taeho Cha

Moonkeun Kim

Jaehwa Park

Jaejin Lee

Hana Kim

A semiconductor device manufacturing method according to the exemplary embodiments of the disclosure includes patterning a substrate, thereby forming an active pattern, forming a trench penetrating the active pattern, forming a support layer covering the trench, forming a first opening at the support layer, forming a gate electrode layer filling the trench through the first opening, and forming a bit line structure electrically connected to the active pattern. The support layer includes a base portion covering a top surface of the active pattern, and a support disposed in the trench.

Semiconductor device including gate structure having first portion and second portion and method for manufacturing the same

A wiring structure includes a filling metal, a cover metal including cobalt (Co) on the filling metal, the cover metal having a first portion along a side surface and along a lower surface of the filling metal, and a second portion along an upper surface of the filling metal, a barrier metal on an outer surface of the first portion of the cover metal, and a capping metal on an outer surface of the second portion of the cover metal, the capping metal including a cobalt (Co) alloy, wherein the filling metal has higher conductivity than the cover metal and the barrier metal.

Wiring structure having double capping structure, manufacturing method thereof, and integrated circuit chip having the same

Method for manufacturing a semiconductor device using a support layer to form a gate structure

In one embodiment, a semiconductor device includes at least two stacked gate structures formed on a substrate. The two stacked gate structures each include a semiconductor layer and a metal layer over the semiconductor layer. The two stacked gate structures on the substrate are characterized by differential intermediate layers, one of the two structures including an ohmic layer and the other of the two structures not including an ohmic layer.

Dual gate structure, fabrication method for the same, semiconductor device having the same, and semiconductor device fabrication method

Dual gate structure, fabrication method for the same, semiconductor device having the same

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Gyeonggi-do, South Korea

Dongchan Lim