Samsung Display Co., Ltd.

Hyundai Motor Company

Kia Motors Corporation

Samsung Displayco., Ltd.

Halla Visteon Climate Control Corporation

Dong Won Park

Hyun Su Kim

Jong Man Bae

Jun Yong Song

Jun Dal Kim

Tae Young Jin

Kyung Youl Min

Jae Yeon Kim

Bo Yeon Kim

Tae Gon Im

Jung Hwan Cho

Myeong Su Kim

Jae-Gwan Jeon

Sung Jae Park

Dong Hwa Shin

Sun Koo Kang

Mu Gyeom Kim

Bong Hyun You

Jun Pyo Lee

Kyung Su Lee

Seung Hwan Moon

Jae Hyoung Park

Cheol Woo Park

Jae Sung Bae

Hyun-Sik Yoon

Song Yi Han

Jae Han Lee

Young Suk Jung

Dong Beom Cho

Byung Kil Jeon

Jun-Young Choi

Yong Bum Kim

Kwang Young Shin

A data receiver, which communicates with a data transmitter through a plurality of lanes, includes: a first reception unit which receives first data through a first lane; a second reception unit which receives second data through a second lane; and a detector which compares the first data and the second data to detect a skew between the first lane and the second lane. The first reception unit includes a first clock data recovery unit which recovers a first clock and first payload data from the first data. The first reception unit controls a loop speed of the first clock data recovery unit based on a skew level of the skew.

Data receiver, display device including the same, and method of receiving data

A transmitter includes a transmission controller which outputs original data through an original data lane, an encoder which encodes the original data into encoded data and outputs the encoded data through an encoded data lane, and a transmission driver which outputs the encoded data at a speed of M (M is a real number greater than 0) gigabits per second through a transmission and reception interface. The transmission driver provides a first clock signal corresponding to an output speed to the encoder, the encoder provides a second clock signal having a second frequency less than a first frequency of the first clock signal to the transmission controller, the transmission controller outputs the original data based on the second clock signal, and the encoder outputs the encoded data based on the first clock signal.

Transmitter and transceiver including the same

A transceiver device includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. The transmitter encodes an original payload to generate a first payload in the second mode, and transmits a clock training pattern and the first payload through the first line and the second line. The receiver decodes the first payload and outputs reception data corresponding to the original payload in the second mode.

Transceiver device, display system including the same, and method of driving transceiver device

A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1−1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1−1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.

Transceiver and method of driving the same

A transceiver includes a transmitter and a receiver which are connected to each other through a first line and a second line. The transmitter transmits a first clock training pattern to the receiver in a first period, transmits a second clock training pattern and a first first payload to the receiver in a second period, and transmits a third clock training pattern and a second first payload to the receiver in a third period. The first clock training pattern, the second clock training pattern, and the third clock training pattern are variable based on a plurality of driving modes.

Transceiver

A transceiver includes a transmitter and a receiver connected to each other by a first line and a second line. The transmitter transmits signals each having a first voltage range to the first line and the second line in a first mode, and signals each having a second voltage range less than the first voltage range to the first line and the second line in a second mode. The receiver includes a low-power driver which receives signals through the first line and the second line in an operating state of the first mode, and stops an operation thereof in the second mode, and a high-speed driver which receives signals through the first line and the second line in the second mode, and stops an operation thereof in the first mode.

A transceiver includes a transmitter and a receiver connected to each other by a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range smaller than the first voltage range to the first line and the second line in a second mode. The transmitter encodes an original payload in the second mode to generate a first payload, and transmits the clock training pattern and the first payload through the first line and the second line.

Transceiver device, driving method thereof, and display system including transceiver

A transceiver includes a transmitter and a receiver coupled to each other through a first line and a second line. The transmitter transmits a first voltage signal of a second logic level or a fourth logic level, among a first logic level, the second logic level, a third logic level, and the fourth logic level, through the first line. The transmitter transmits a second voltage signal of the first logic level or the third logic level through the second line. The receiver generates an output signal having one of four values based on the first voltage signal and the second voltage signal.

A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1-1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1-1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.

A transceiver device includes a transmitter and a receiver connected through first and second lines. A first frame period includes an active period for transmitting a first payload and a vertical blank period including a frequency hopping period. The transmitter transmits, to the first and second lines, signals having a first voltage range in a first mode and signals having a second voltage range in a second mode. The transmitter generates a first horizontal synchronization signal in the second mode except for the frequency hopping period, encodes the first horizontal synchronization signal to horizontal synchronization data, and generates a second horizontal synchronization signal in the first mode in the frequency hopping period. The transmitter adds a first clock training pattern to the horizontal synchronization data except for the frequency hopping period, and adds a second clock training pattern to first horizontal synchronization data after the frequency hopping period.

Transceiver device and method of driving the same

A display device includes a substrate; and a red pixel electrode, a green pixel electrode, and a blue pixel electrode disposed on the substrate. Each of the red pixel electrode, the green pixel electrode, and the blue pixel electrode includes a transverse stem portion, a longitudinal stem portion, and a fine branch portion. An angle between the transverse stem portion and the fine branch portion of the red pixel electrode, an angle between the transverse stem portion and the fine branch portion of the green pixel electrode, and an angle between the transverse stem portion and the fine branch portion of the blue pixel electrode are different from each other.

Display device including pixels with differently angled stem and branch portions

A display device includes a timing controller configured to supply a first set signal to a data control signal line in a first frequency mode, and to supply a second set signal and a data signal to the data control signal line in a second frequency mode that is different from the first frequency mode, a data driver configured to recover the data signal supplied to the data control signal line according to a signal recovery characteristic value, to generate a plurality of data voltages based on the recovered data signal, and to adjust the signal recover characteristic value based on the first set signal and the second set signal, and a display unit including a plurality of pixels that emit lights with gray scales corresponding to the plurality of data voltages.

Display device and driving method thereof

A display device includes a display unit including a plurality of pixels, each of the pixels including a plurality of subpixels, and a display area having a corner of a non-right angular shape, and a signal controller controlling the display unit to display an image based on an input image signal and a control signal and changing a gray value of the image signal based on different light transmittance values of subpixels included in a first pixel, among the plurality of pixels, positioned at the corner of the non-right angular shape if the image signal corresponds to the first pixel at the corner of the non-right angular shape.

Display device adjusting luminance of pixel at boundary and driving method thereof

A display device may include a timing controller, a data driver and a plurality of pixels. The timing controller supplies a clock training pattern over a data/clock signal line in a first time period, and supplies pixel/control data over the data/clock signal line in a second time period. The data driver generates a clock signal, using the clock training pattern, in the first period, and generate a plurality of data voltages based on the plurality of pixel data, using the clock signal, in the second period. The plurality of pixels receive the plurality of data voltages and emit corresponding light. During the second period, the data driver outputs a feedback signal to the timing controller indicating that the locking of the clock signal has failed. The timing controller re-supplies the clock training pattern in response to the feedback signal.

A display device includes a display unit which includes a plurality of pixels and a display area having a corner of a non-right angular shape and a signal controller which controls the display unit to display an image through the plurality of pixels based on an input image signal, detects a specific pattern in a partial region, of the image, corresponding to a partial area, of the display unit, including the corner of the non-right angular shape, and controls the display unit to display a partial image corresponding to the partial region of the image in the display area without crossing the corner, according to a position of the specific pattern in the partial region.

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Yongin-si, South Korea

Dong Won Park