Samsung Electronics Co., Ltd.

Lg Electronics Inc.

Hewlett-packard Development Company, L.p.

Lg Display Co., Ltd.

S-printing Solution Co., Ltd.

Dong-Uk Kim

Jong-in Kim

Jooyoung Hwang

Insoon Jo

Yohan Ko

Woong-Yong Choi

Sung-Hoon Kim

Yoon-Heung Tak

Tae-Jeong Kim

Ung-Chan Yoon

Jong-hwa Joo

Duckho Bae

Byeong-no Jeong

Ki-Dong Kim

Jin-Mok Kim

Youngkwang Shin

Sang-Dae Kim

Jaehong Min

Gun-soo Chang

Yong In Lee

DuckJoo Lee

Seung-Hyun Ha

Yong-hun Kim

Hanjoon Kim

Ji-Hoon Kim

Joo-Young Hwang

Seung-gweon Lee

Jeonguk Kang

Yong-Taek Jeong

Ki-hyun Yoo

Kwang-Hyun La

Seungjun Yang

Chang-sup Ahn

Sangyeun Cho

Han-Joon Kim

Kwang-Hyun Kim

Min-Sik Ji

Il-Joon Kim

Duck-Ho Bae

Ho-Sun Lee

Jae-Hong Min

Yoon-Soo Han

Seung-Chan Park

Jin-Ho Yi

Jeong-Sup Sim

Hyung-Woo Ryu

Lee-Soon Park

You-Ra Choi

Hee-Wan Moon

Joonho Baek

JinHo Yi

A computing system includes a host, a first electronic device connected to the host, and a second electronic device that communicates with the host through the first electronic device. The first electronic device requests a command written in a submission queue of the host based on a doorbell transmitted from the host, stores the command transmitted from the host, requests write data stored in a data buffer of the host, and stores the write data of the data buffer transmitted from the host.

Computing system for reducing latency between serially connected electronic devices

A storage device which is connected to a host using a virtual memory includes a solid state drive that receives a streaming access command including a logical block address (LBA) list and a chunk size, and prefetches stream data requested according to the LBA list and the chunk size from a nonvolatile memory device without an additional command. The prefetched stream data is sequentially loaded onto a buffer, and an in-storage computing block accesses a streaming region registered on the virtual memory to sequentially read the stream data loaded onto the buffer in units of the chunk size. The buffer is mapped onto a virtual memory address of the streaming region.

Storage device processing stream data, system including the same, and operation method

A storage device includes a first interface, an operation circuit, and a nonvolatile memory. The first interface receives a first data chunk from a host device. The operation circuit generates first processed data by processing the first data chunk and generates a first signal indicating a size of the first processed data. The nonvolatile memory stores the first processed data in a storage location, when the storage location at which the first processed data are to be stored is designated to the storage device based on the first signal. The first interface outputs the first signal to the host device.

Storage device and storage system performing offloaded tasks from host

A developer cartridge including a housing to contain a developer and including a developer outlet from which the developer is dischargeable. A transport member is arranged inside the housing to rotate to transport the developer to the developer outlet. A volume adjustment member is insertable inside the transport member opposite to the developer outlet to adjust an inside volume of the housing.

Developer cartridge being capable of adjusting inside volume thereof

A computing system includes a host, a first electronic device including a memory and an accelerator, and a second electronic device including a direct memory access (DMA) engine. Based on a command transmitted from the host through the first electronic device, the DMA engine transmits data and completion information of the command to the first electronic device. The memory includes a data buffer storing the data and a completion queue buffer storing the completion information. The accelerator executes a calculation on the data. The DMA engine transmits the data to the first electronic device and then transmits the completion information to the first electronic device.

Computing system for transmitting completion early between serially connected electronic devices

A developer cartridge including a housing, a spring auger, and a rotation member. The housing accommodating a developer and including a first end portion and a second end portion in a lengthwise direction. The housing is to discharge the developer through a developer discharge outlet coupled to the housing and adjacent to one of the first end portion and the second end portion. The spring auger is located inside the housing and is to rotate to transport the developer to the developer discharge outlet. The rotation member is located at the first end portion of the housing and connected to a first end of the spring auger to rotate the spring auger. A first portion of a bottom surface of the housing is flat and a second portion of the bottom surface is internally convex from the first portion are repeatedly arranged on the bottom surface in the lengthwise direction.

Developer cartridge with spring auger

A method of verifying an application, according to an embodiment, includes: storing application codes; loading a part of the application codes into a memory; and verifying the application by using the codes loaded into the memory.

Device and method for verifying application

An electronic system includes a host device and a storage device including a first memory device of a volatile type and a second memory device of a nonvolatile type. The first memory device is accessed by the host device through a memory-mapped input-output interface and the second memory device is accessed by the host device through a block accessible interface. The storage device provides a virtual memory region to the host device such that a host-dedicated memory region having a first size included in the first memory device is mapped to the virtual memory region having a second size larger than the first size.

Storage device providing a virtual memory region, electronic system including the same, and method of operating the same

Storage device processing stream data, system including the same, and operation method thereof

An electronic device that prevents damage and an operation method thereof are provided. The electronic device includes a transceiver, a memory configured to store a first part of a first program, and a processor configured to receive, using the transceiver, a second part of the first program from a second electronic device and perform a first function of the first program by using the first part and the second part.

Electronic device and operation method thereof

A method and system for maximizing bandwidth of a Peripheral Component Interconnect Express (PCIe) Peer-to-Peer (P2P) connection determine a maximum bandwidth and a maximum read request size of a first device, determining a maximum bandwidth and a minimum payload size of a second device, calculate a calculated maximum payload size of the second device by using the maximum read request size of the first device and a bandwidth ratio between the first device and the second device, compare the minimum payload size of the second device with the calculated maximum payload size, and set an operational payload size of the second device to the calculated maximum payload size when the calculated maximum payload size is equal to or greater than the minimum payload size.

System and method for maximizing bandwidth of PCI express peer-to-peer (P2P) connection

A memory package includes a multi-level package substrate, a first memory chip, a second memory chip, a first band pass filter and a second band pass filter. The multi-level package substrate includes a plurality of wiring layers and a plurality of insulating layers alternately stacked on one another. The first memory chip is on the multi-level package substrate, and includes a plurality of first memory cells and a first receiver. The second memory chip is on the first memory chip, and includes a plurality of second memory cells and a second receiver. The first band pass filter is in the multi-level package substrate, is connected to the first receiver, and passes a first data signal within a first frequency band. The second band pass filter is in the multi-level package substrate, is connected to the second receiver, and passes a second data signal within the first frequency band.

Memory packages and related semiconductor packages

A server device includes a plurality of interface circuits configured to connect with a network, and perform format conversion between network packets and data chunks, the network packets being packets communicated with the network, the data chunks complying with an internal format; a plurality of memory modules operating independently of each other; and a switch circuit connected between the plurality of interface circuits and the plurality of memory modules, the switch circuit being configured to select at least one memory module from among the plurality of memory modules based on an attribute of a first data chunk transmitted from the plurality of interface circuits and, send the first data chunk to the selected memory module, wherein the selected at least one memory module is configured to, decode the first data chunk, and perform a read or write operation associated with the first data chunk based on the decoding result.

Server device including interface circuits, memory modules and switch circuit connecting interface circuits and memory modules

A server includes communication circuitry configured to communicate with a plurality of external terminals, a storage which stores reference data for hardware integrity verification of the plurality of external terminals, and a processor configured to verify the hardware integrity of a second external terminal using the reference data, when a request for the hardware integrity verification of the second external terminal is received through the communication circuitry from a first external terminal.

Server and user terminal

Growing community of inventors

Seoul, South Korea

Dong-Uk Kim