Samsung Electro-mechanics Co., Ltd.

Dong Sup Park

Sung Ho Lee

Sang Kyun Lee

Chang Ryul Jung

Yeong Su Cho

Kang Heon Hur

Wan Suk Yang

Hyun Chul Jung

Kwan Hyeong Kim

Ill Kyoo Park

A chip-type electric double layer capacitor includes: a resin case having a housing space provided therein and formed of insulating resin; first and second external terminals inserted into the resin case by insert injection molding, each having a first portion exposed to an outer surface of the resin case for external contact and a second portion exposed to an inner surface of the housing space for internal contact; a sealing portion including a groove portion provided in the resin case along a circumference of at least one of the first and second external terminals and a resin filling the groove portion; and an electric double layer capacitor cell mounted in the housing space and electrically connected to the second portion of the first and second external terminals.

Chip-type electric double layer capacitor cell and method of manufacturing the same

An electric double layer capacitor (EDLC) includes an electric double layer cell and first and second external electrodes. The electric double layer cell includes a separator and at least one first polarizable electrode and at least one second polarizable electrode. The first and second external electrodes are formed at first and second side surfaces of the electric double layer cell facing each other, respectively. The first polarizable electrode includes a first current collection layer and a first active material layer formed on either surface of the first current collection layer facing the separator and the second polarizable electrode includes a second current collection layer and a second active material layer formed on either surface of the second current collection layer facing the separator.

Electric double layer capacitor

The present invention provides a chip type electric double layer capacitor including: a lower case having an internal space of which an upper surface is opened and an external terminal of which portions exposed to a bottom of the internal space and the outside are connected to each other; an electric double layer capacitor cell disposed in the internal space of the lower case to be electrically connected to the portion of the external terminal, which is exposed to the bottom of the internal space; and an upper cap mounted on the lower case to cover the internal space, and a method for manufacturing the same.

Chip type electric double layer capacitor and method for manufacturing the same

There are provided methods of manufacturing an electric double layer capacitor cell and an electric double layer capacitor and an apparatus for manufacturing an electric double layer capacitor cell. The method of manufacturing the electric double layer capacitor cell includes preparing first and second electrode sheets by printing electrode material onto conductive sheets, respectively, with the exception of regions to be provided as first and second terminal lead-out portions in the conductive sheets; punching the first and second electrode sheets so as to form a plurality of first and second unit electrodes, respectively, each first unit electrode having the first terminal lead-out portion and each second unit electrode having the second terminal lead-out portion; stacking the first and second electrode sheets with a separator interposed therebetween in order that the plurality of first and second unit electrodes are overlapped; and cutting the first and second electrode sheets being stacked into the first and second unit electrodes.

Methods of manufacturing electric double layer capacitor cell and electric double layer capacitor and apparatus for manufacturing electric double layer capacitor cell

Growing community of inventors

Suwon-si, South Korea

Dong Sup Park