Skhynix Inc.

Hynix Semiconductor Inc.

Dong Sun Sheen

Seok Pyo Song

Sang Tae Ahn

Hyeon Ju An

Dong Hun Lee

Ki Hong Lee

Young Jin Lee

Seung Hwan Kim

In Su Park

Jung Shik Jang

Jin Kook Kim

Jung Dal Choi

Sung Yong Chung

Se Young Oh

Sung Hoon Lee

Min Soo Kim

Young Ho Lee

Il Do Kim

Won Joon Choi

Young Ho Yang

Hyun Chul Sohn

Min Sung Ko

Jong Gi Kim

Sung Jin Whang

Woo Jae Chung

Jung Myoung Shim

Mi Ri Lee

Gil Jae Park

Chi Ho Kim

Bo Min Seo

Hyeng Woo Eom

Kwang Wook Lee

Kyeong Bae Kim

Seung Ho Pyi

Joo Hee Han

Ki Hong Yang

Su Ock Chung

Il Sup Jin

Seon Yong Cha

Jin Hae Choi

A memory device includes a substrate, an active layer spaced apart from a surface of the substrate and laterally oriented in a first direction and including an opened first side, a closed second side, and a channel layer between the first side and the second side, and a word line laterally oriented in a second direction crossing the first direction while surrounding the channel layer.

Memory device with cross shape active layer surrounded by word line

The present technology includes a semiconductor memory device. The semiconductor memory device includes a first channel pattern and a second channel pattern each extending in a vertical direction and facing each other, a channel separation pattern formed between the first channel pattern and the second channel pattern and extending in the vertical direction, a stack including conductive patterns each surrounding the first channel pattern, the second channel pattern, and the channel separation pattern and stacked apart from each other in the vertical direction, a first memory pattern disposed between each of the conductive patterns and the first channel pattern, and a second memory pattern disposed between each of the conductive patterns and the second channel pattern.

Semiconductor memory device

Memory device

A memory cell includes: a substrate; an active layer spaced apart from a surface of the substrate and extending in a direction which is parallel to the surface of the substrate; a bit line coupled to one side of the active layer and extending in a direction perpendicular to the surface of the substrate; a capacitor coupled to another side of the active layer and spaced apart from the surface of the substrate; and a word line vertically spaced apart from the active layer and extending in a direction intersecting with the active layer, wherein the word line includes a first notch-shaped sidewall and a second notch-shaped sidewall that face each other.

Memory cell and memory device

The method of manufacturing a semiconductor device include: forming conductive patterns in interlayer spaces between interlayer insulating layers, the conductive patterns being separated from each other by a slit passing through the interlayer insulating layers, wherein the conductive patterns include a first by-product; generating a second by-product of a gas phase by reacting the first by-product remaining in the conductive patterns with source gas; and performing an out-gassing process to remove the second by-product.

Method of manufacturing semiconductor device

Provided herein may be a semiconductor device and a method of manufacturing the same. The semiconductor device may include a memory string including memory cells coupled to each other in series via a channel layer, the memory string coupled between a bit line and a second source line. The semiconductor device may include a first source line electrically coupled to the second source line through the channel layer.

Semiconductor device and method of fabricating the same

Method of manufacturing semiconductor device through by-product removal from conductive layer

The device includes plural control gates stacked on a substrate, plural first channels, configured to penetrate the control gates, and plural memory layer patterns, each located between the control gate and the first channel, configured to respectively surround the first channel, wherein the memory layer patterns are isolated from one another.

3-dimensional nonvolatile memory device and method of manufacturing the same

A method of manufacturing a semiconductor device includes forming a sacrificial pattern, forming a first stacked structure including first material layers and second material layers alternately stacked on the sacrificial pattern, forming first semiconductor patterns passing through the first stacked structure and dielectric multi-layers surrounding the first semiconductor patterns, forming a slit passing through the first stacked structure and exposing the sacrificial pattern, forming a spacer on an inner wall of the slit, forming a first opening by removing the sacrificial pattern through the slit, forming a second opening by partially removing the dielectric multi-layers through the first opening to expose lower portions of the first semiconductor patterns, and forming a connection pattern in contact with the first semiconductor patterns in the first and second openings.

A semiconductor device according to an embodiment of the present invention includes a vertical channel layer protruding upward from a semiconductor substrate, a tunnel insulating layer covering a sidewall of the vertical channel layer, a plurality of floating gates separated from each other and stacked one upon another along the vertical channel layer, and surrounding the vertical channel layer with the tunnel insulating layer interposed therebetween, a plurality of control gates enclosing the plurality of floating gates, respectively, and an interlayer insulating layer provided between the plurality of control gates.

Semiconductor device and method of manufacturing the same

A semiconductor device includes a semiconductor substrate having an active region which includes a gate forming zone and an isolation region; an isolation layer formed in the isolation region of the semiconductor substrate to expose side surfaces of a portion of the active region including the gate forming zone, such that the portion of the active region including the gate forming zone constitutes a fin pattern; a silicon epitaxial layer formed on the active region including the fin pattern; and a gate formed to cover the fin pattern on which the silicon epitaxial layer is formed.

Semiconductor device having reduced standby leakage current and increased driving current and method for manufacturing the same

Growing community of inventors

Gyeonggi-do, South Korea

Dong Sun Sheen