Lg Semicon Co., Ltd.

Dong Soo Cho

An instruction decoding unit in a microcomputer is disclosed having an instruction word capable of being selected by a user to conveniently produce application software while maintaining security. The decoding unit in a microcomputer includes an instruction register for storing instructions fetched from a memory, an instruction decoder for decoding instruction codes of the instructions stored in the instruction register and for designating micro-instructions to be executed, a micro-ROM for outputting a series of the micro-instructions designated by the instruction decoder, and a user instruction selector for selecting or changing the micro-instructions of the micro-ROM in response to user's selection so as to change the operation of an instruction word.

User initiated microcode modification

A communication system and method requiring only a single line for communication among integrated circuits (ICs). The system includes: a single communication line; plural ICs coupled to the single communication line; one of the ICs operating as a master IC; one of the ICs operating as a transmitting IC and one of the ICs operating as a receiving IC according to a designation by the master IC. The master IC transmits, on the single communication line, a reference signal having a reference signal width, C.sub.PW, to the other ICs. The master IC designates a first one of the ICs and a second one of the ICs as a chosen transmitting IC and a chosen receiving IC, respectively, for an imminent data-transmission operation, by transmitting signals of differing widths (relative to the reference signal width) over the single communication line. The ICs store the reference signal width and recognize their designation or not for the imminent data-transmission operation, respectively, by comparing the signals of differing widths against the reference signal width.

Single line interface system and method thereof

A pulse width modulation (PWM) circuit is disclosed for multiple channels. The circuit allows output pulses of a PWM signal for each channel to be distributed not simultaneously but with a time difference so that the power consumption is temporally distributed. The PWM circuit includes a counter for counting input clocks to generate a counting signal of multiple bits, a counter changing means connected to the counter for changing a bit value of the counting signal, a register for receiving data input from a data bus and holding the received data, a comparator connected to the register and the counter changing means for outputting a setting signal if the bit value counting signal changed from the counter changing means reaches a predetermined level, and outputting a coincidence signal if the compared data of the register and the changed counting signal coincide, and a pulse output portion connected to the comparator for setting output pulses if the setting signal is generated, and resetting the outputs if the coincidence signal is generated. The timing points for output of the PWM pulses are different from one another so as to be distributed.

Growing community of inventors

Kyungki-do, South Korea

Dong Soo Cho