Samsung Electronics Co., Ltd.

Postech Academy-industry Foundation

Dong-Myung Lee

Seog-Heon Ham

Gun-Hee Han

Jae-Youl Lee

Jae-Suk Yu

Hyun-Wook Lim

Dong-hoon Baek

Kil-Hoon Lee

Young-min Choi

Dong-Soo Kim

Jae-Yoon Sim

Gunhee Han

Jung-Pil Lim

Young-Hun Lee

Kyung-Ho Ryu

Han-Su Pae

A method of driving a display by communicating with a controller through a first channel and a second channel includes; generating recovery data from a signal received through the first channel during a frame data period, detecting a vertical blank period between frame data periods, checking a training trigger event history during the vertical blank period, and during the vertical blank period, transmitting a training request direct to the first channel through the second channel when there is a training trigger event history.

Data line driving circuit, display driving circuit, and method driving display

A method of recovering a clock and data from an input data signal including an embedded clock, the method including generating a recovery clock signal from the input data signal based on a first window signal; detecting a unit interval corresponding to one bit of the input data signal based on the recovery clock signal; delaying a signal synchronized with the recovery clock signal based on the unit interval; and generating the first window signal based on the delayed signal.

Clock data recovery circuit, apparatus including same and method for recovery clock and data

The display driving circuit including a type detector for receiving a data packet including a 2-bit embedded signal, in which a clock signal embedded in a data signal, and outputting a first reference clock or a second reference clock different from the first reference clock according to a type of the data packet, a window generator for receiving multi-phase clocks and providing to the type detector a first window reference and a second window reference different from the first window reference to be used in determining the type of the data packet, a buffer for delaying the first reference clock by a first interval and delaying the second reference clock by a second interval different from the first interval, and a multiplexer for multiplexing the delayed first and second reference clocks and outputting a multiplexed reference clock may be provided.

Display driving circuit

A digital double sampling method, a related complementary metal oxide semiconductor (CMOS) image sensor, and a digital camera comprising the CMOS image sensor are disclosed. The method includes generating first digital data corresponding to an initial voltage level apparent in a pixel in response to a reset signal, inverting the first digital data, outputting a detection voltage corresponding to image data received from outside of the CMOS image sensor, and counting in synchronization with a clock signal, starting from an initial value equal to the inverted first digital data, and for an amount of time responsive to a voltage level of the detection voltage.

Digital double sampling method, a related CMOS image sensor, and a digital camera comprising CMOS image sensor

Digital double sampling method, a related CMOS image sensor, and a digital camera comprising the CMOS image sensor

A timing controller, a source driver, and a display driver integrated circuit (DDI) having improved test efficiency and a method of operating the DDI are provided. The timing controller includes a code generation unit for generating a first code from display data, a protocol encoder for generating a data sequence including the display data and the first code, and a transmission unit for providing the data sequence to a source driver through a link.

Timing controller, source driver, and display driver integrated circuit having improved test efficiency and method of operating display driving circuit

A complementary metal oxide semiconductor (CMOS) image sensor includes a photodiode, a switch and a comparator. The switch transfers a sensing signal to a sensing node from the photodiode. The comparator, which is directly connected to the sensing node, compares the sensing signal of the sensing node with a reference signal. The comparator outputs a signal corresponding to a voltage difference between the sensing signal and the reference signal.

CMOS image sensor and image signal detecting method thereof

An image sensor comprises an active pixel sensor (APS) array, a first analog-to-digital converter (ADC) and a ramp signal generator. The APS array includes a plurality of pixels arranged in a two-dimensional matrix, wherein the APS array generates a reset signal and an image signal for each selected column of the APS array. The first ADC includes a correlated double sampling (CDS) circuit array comprising CDS circuits that are arranged for each column of the APS array, wherein the first ADC generates a digital code from a signal corresponding to the difference between the reset signal and the image signal which are generated by the CDS circuit using a ramp signal. The ramp signal generator generates the ramp signal, wherein a second ADC receives a feedback of the generated ramp signal and generates a feedback reference code, and wherein the ramp signal generator calibrates the ramp signal based on a comparison using the feedback reference code.

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Seoul, South Korea

Dong-Myung Lee