United Microelectronics Corp.

Dong-Ming Wu

Hui-Lin Wang

Po-Kai Hsu

Ching-Hua Hsu

Yi-Yu Lin

Ju-Chun Fan

Che-Wei Chang

Chen-Yi Weng

Jing-Yin Jhang

Si-Han Tsai

Chun-Hao Wang

A memory array includes at least one strap region, at least two sub-arrays, a plurality of staggered, dummy magnetic storage elements, and a plurality of bit line structures. The strap region includes a plurality of source line straps and a plurality of word line straps. The two sub-arrays include a plurality of staggered, active magnetic storage elements. The two sub-arrays are separated by the strap region. The staggered, dummy magnetic storage elements are disposed within the strap region. The bit line structures are disposed in the two sub-arrays, and each of the bit line structures is disposed above and directly connected with at least one of the staggered, active magnetic storage elements.

Memory array

A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Magnetoresistive random access memory

Growing community of inventors

Taichung, Taiwan

Dong-Ming Wu