Samsung Electronics Co., Ltd.

Dong-Kak Lee

Han-jin Lim

Joon Hyuk Kim

Bong-hyun Kim

Gil-heyun Choi

Byung-Lyul Park

Ki-Hyun Hwang

Pil-Kyu Kang

Jin-Gyun Kim

Dae-lok Bae

Soo-jin Hong

Sun-ghil Lee

Deok-hyung Lee

Hee-don Hwang

Sung-gil Kim

An electrode structure is disclosed. The electrode structure includes a first polysilicon layer doped with resistance adjustment impurities; a second polysilicon layer for adjusting grains, formed in the first polysilicon layer and doped with grain adjustment impurities; an ohmic metal layer formed on the first and second polysilicon layers; a barrier metal layer formed on the ohmic metal layer; and a metal layer formed on the barrier metal layer.

Electrode structure, method of fabricating the same, and semiconductor device including the electrode structure

A semiconductor device includes a device isolation pattern in which a polysilicon layer pattern doped with oxygen, carbon or nitrogen is interposed between an inner wall of a trench and a nitride liner. The semiconductor device includes a semiconductor substrate including a trench, a polysilicon layer pattern on a surface of the trench, a nitride layer pattern on the polysilicon layer pattern, and an insulation layer pattern on the nitride layer pattern and filling the trench. The polysilicon layer pattern may be doped with oxygen, carbon and/or nitrogen. Related manufacturing methods are also disclosed.

Semiconductor trench isolation including polysilicon and nitride layers

Provided are semiconductor devices including a semiconductor substrate, an insulating layer including a contact hole through which the semiconductor substrate is exposed, and a polysilicon layer filling the contact hole. The polysilicon layer is doped with impurities and includes an impurity-diffusion prevention layer. In the semiconductor devices, the impurities included in the polysilicon layer do not diffuse into the insulating layer and the semiconductor substrate due to the impurity-diffusion prevention layers.

Semiconductor device having impurity doped polycrystalline layer including impurity diffusion prevention layer and dynamic random memory device including the semiconductor device

A conductive layer buried-type substrate is disclosed. The substrate includes a silicon oxidation layer bonded to a supporting substrate, an adhesion promotion layer that is formed on the silicon oxidation layer and improves an adhesion between the silicon oxidation layer and a conductive layer, wherein the conductive layer is formed on the adhesion promotion layer and comprises a metal layer, and a single crystal semiconductor layer formed on the conductive layer.

Conductive layer buried-type substrate, method of forming the conductive layer buried-type substrate, and method of fabricating semiconductor device using the conductive layer buried-type substrate

A method of forming a conductive structure in a semiconductor device includes forming a conductive layer on a substrate, forming a conductive layer pattern on the substrate by patterning the conductive layer, forming an oxide layer on the substrate and a portion of the conductive layer, and forming a capping layer on the oxide layer and the conductive layer pattern.

Method of forming a conductive structure in a semiconductor device and method of manufacturing a semiconductor device

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Seoul, South Korea

Dong-Kak Lee