Samsung Electronics Co., Ltd.

Dong-jin Jung

Ki-Nam Kim

Sung-Hoon Kim

Jun-kwon Choi

Su-jin Ryu

Kyu-chun Han

Ki-nam Kim

Mi-hyang Lee

Dae-jong Noh

Jun-Kwon Choi

Su-Jin Ryu

Provided are an imaging device and a video generation method by the imaging device, and more specifically, an imaging device, which enlarges an object selected in a video displayed on a screen and displays same, and a video generation method by the imaging device. According to an example embodiment, an object selected in a video displayed on a screen is enlarged, and the enlarged object is tracked and then displayed on the screen.

Imaging device and video generation method by imaging device

An electronic apparatus is provided. The electronic apparatus includes a processing unit configured to extract at least one frame selected from a plurality of frames of moving-picture data as a candidate thumbnail image, wherein the at least one frame corresponds to at least one frame selected according to a plurality of thumbnail extraction criteria, and to determine at least one candidate thumbnail image selected from a group comprising candidate thumbnail images obtained by the extracting, as at least one final thumbnail image, based on a thumbnail extraction criterion to which the candidate thumbnail images obtained by the extracting respectively correspond, and a display unit configured to display the at least one final thumbnail image.

Apparatus and method of providing thumbnail image of moving picture

A digital image signal processing apparatus includes a digital signal processing unit, a plurality of display units, and a display driving unit. The digital signal processing unit provides a plurality of pieces of image data that respectively form a plurality of images. The plurality of display units display images corresponding respectively to the plurality of pieces of the image data. The display driving unit includes a display memory that records the plurality of pieces of image data, a recording address unit that controls the plurality of pieces of image data to be recorded in the display memory, and a plurality of display address units that respectively read the recorded pieces of image data and provide the recorded pieces of image data respectively to the display units. Accordingly, a photographer may directly display a desired image to a photographed person as a high-quality filtered image without a separate selection operation.

Digital image signal processing apparatus for displaying different images respectively on display units and method of controlling the same

A method of manufacturing a semiconductor device including a ferroelectric capacitor is provided. A conductive plug is formed in a first insulating layer on a semiconductor substrate. A first lower metal layer is formed overlying the conductive plug. A lower metal oxide layer is formed on the first lower metal layer. A second lower metal layer is formed on top of the lower metal oxide layer. A ferroelectric layer is formed from a ferroelectric material on the lower electrode layer at a crystallizing temperature of approximately 700&deg; C. A first upper metal layer is formed on top of the ferroelectric layer. Thereafter, a heat treatment higher than the crystallizing temperature is performed. An upper metal oxide layer is formed on top of the first upper metal layer. A second upper metal layer is formed on top of the upper metal oxide layer.

Semiconductor device including ferroelectric capacitor and method of manufacturing the same

A ferroelectric capacitor with a multilayer ferroelectric film to prevent degradation of its ferromagnetic characteristics, wherein the ferroelectric film is made of a lower layer of PZT or PLZT formed on a lower electrode and an upper, titanium rich, layer of PZT, PLZT, or PbTiO , an upper electrode formed on the upper layer of the ferroelectric film and a protective layer formed to cover the ferroelectric capacitor.

Ferroelectric capacitor and method for fabricating the same

A ferroelectric capacitor with a ferroelectric film having a relatively larger amount of titanium constituent than zirconate constituent improves ferroelectric characteristics. The method for fabricating the ferroelectric capacitor includes the step of performing a heat treatment in an oxygen atmosphere after forming a contact opening in an insulating layer which covers an already formed ferroelectric capacitor. This heat treatment in an oxygen atmosphere can minimize undesirable side effects resulting from a platinum electrode oxidizing the ferroelectric film components.

Ferroelectric memory device having improved ferroelectric characteristics

Disclosed is a triple metal line 1T/1C ferroelectric memory device and a method to make the same. A ferroelectric capacitor is connected to the transistor through a buried contact plug. An oxidation barrier layer lies between the contact plug and the lower electrode of the capacitor. A diffusion barrier layer covers the ferroelectric capacitor to prevent diffusion of material into or out of capacitor. As a result of forming the oxidation barrier layer, the contact plug is not exposed to the ambient oxygen atmosphere thereby providing a reliable ohmic contact between the contact plug and the lower electrode. Also, the memory device provides a triple interconnection structure made of metal, which improves device operation characteristics.

Triple metal line 1T/1C ferroelectric memory device and method for fabrication thereof

Integrated circuit ferroelectric memory devices are manufactured by forming a first patterned conductive layer on an integrated circuit substrate, to define a lower capacitor electrode and a gate electrode that is spaced apart therefrom. A source region and a drain region are formed on opposite sides of the gate electrode. A ferroelectric layer is formed on the lower capacitor electrode. An upper capacitor electrode is formed on the ferroelectric layer opposite the lower capacitor electrode, to thereby form a ferroelectric capacitor. After forming the upper capacitor electrode, an interconnect layer is formed that electrically connects the top electrode and the source region. A bit line is formed that electrically contacts the drain region. Preferably, both the interconnect layer and the bit line are formed from the same conductive layer. Integrated circuit ferroelectric memory devices include an integrated circuit substrate including an elongated active region therein, and a pair of spaced apart word lines that cross the elongated active region. A drain region is provided in the elongated active region between the pair of word lines. A pair of source regions is provided in the elongated active region, a respective one of which is outside the pair of spaced apart word lines on opposite sides of the drain region. A pair of ferroelectric capacitors are provided outside the elongated active region. A respective one of the ferroelectric capacitors is adjacent a respective one of the pair of source regions. An interconnect layer electrically connects a respective one of the upper capacitor electrodes to a respective one of the source regions and a bit line, electrically connected to the drain region and extending along the integrated circuit substrate orthogonal to the word lines.

Ferroelectric memory devices including patterned conductive layers

Ferroelectric capacitor

Integrated circuit ferroelectric memory devices include a pair of spaced apart word lines which cross an elongated active region, a drain region in the active region between the pair of word lines, and a pair of source regions in the active region outside the pair of spaced apart word lines on opposite sides of the drain region. A pair of ferroelectric capacitors outside the elongated active region is also included, a respective one of which is adjacent a respective one of the pair of source regions. Each of the ferroelectric capacitors includes spaced apart first and second electrodes and a ferroelectric layer between them. A respective one of the first electrodes is electrically connected to a respective one of the pair of source regions. A pair of plate lines is electrically connected to a respective one of the second electrodes and a bit line is electrically connected to the drain region. Integrated circuit ferroelectric memory devices according to the invention may be formed by fabricating a field effect transistor in an integrated circuit substrate and forming a first electrode, a ferroelectric layer, a diffusion barrier layer and a second electrode on the substrate. A first patterned metal layer electrically connects the first electrode to the source region of the field effect transistor and also electrically contacts the drain region. A second patterned metal layer electrically contacts the second electrode.

Ferroelectric memory devices including capacitors located outside the active area and made with diffusion barrier layers

A method of forming a crystalline perovskite ferroelectic layer without a non-perovskite crystalline phase, includes depositing an amorphous ferroelectric material layer on a semiconductor substrate, annealing the amorphous ferroelectric material layer, and sequentially dry etching and wet etching the top surface of the ferroelectric material layer, such that non-perovskite crystalline phase is removed from the ferroelectric material layer.

Method for forming a crystalline perovskite ferroelectric material in a semiconductor device

A ferroelectric capacitor with a ferroelectric film having a relatively larger amount of titanium constituent than zinconate constituent improves ferroelectric characteristics. The method for fabricating the ferroelectric capacitor includes the step of performing a heat treatment in an oxygen atmosphere after forming a contact opening in an insulating layer which covers an already formed ferroelectric capacitor. This heat treatment in an oxygen atmosphere can minimize undesirable side effects resulting from a platinum electrode oxidizing the ferroelectric film components.

Growing community of inventors

Suwon, South Korea

Dong-jin Jung