Samsung Electronics Co., Ltd.

Dong-il Bae

Sang-hyeon Lee

Kang-Ill Seo

Dong-won Shin

A method of manufacturing a semiconductor device includes forming a fin structure on a substrate. A sacrificial layer pattern is formed on the fin structure. An active layer pattern is formed on the sacrificial layer pattern. A dummy gate pattern is formed on the active layer pattern. A spacer is formed on the dummy gate pattern. A source/drain structure is formed on the active layer pattern using an epitaxial growth process. An interlayer dielectric layer is formed on the dummy gate pattern and the active layer pattern. The interlayer dielectric layer is planarized to expose the dummy gate pattern. The dummy gate pattern is removed to expose the active layer pattern and the sacrificial layer pattern. The exposed sacrificial layer pattern is removed to form a through-hole between the exposed active layer pattern and the fin structure, the second portion of the sacrificial layer pattern is not removed.

Semiconductor device having fin-type field effect transistor and method of manufacturing the same

DRAM cells include a common drain region in an integrated circuit substrate and first and second source regions in the integrated circuit substrate, a respective one of which is laterally offset from the common drain region along respective first and second opposite directions. First and second storage nodes are provided on the integrated circuit substrate, a respective one of which is electrically connected to a respective one of the first and second source regions. The first and second storage nodes are laterally offset from the respective first and second source regions along the first direction.

Methods for fabricating dynamic random access memory cells having laterally offset storage nodes

Dynamic random access memory cells having laterally offset storage nodes

Methods for manufacturing a storage node of a capacitor of a semiconductor device and a storage node manufactured by these methods are provided. An exemplary method for manufacturing a storage node of a capacitor of a semiconductor device includes forming a mold layer on a semiconductor substrate, forming a mold for the storage node by patterning the mold layer by a photolithography process, introducing a photomask which includes a plurality of light transmitting patterns separated from each other and which define the region to be occupied by the storage node, and forming a storage node that has the shape formed by the mold. The photolithography process is performed with the occurrence of a pattern bridge phenomenon, e.g., the transferred light transmitting patterns are connected to each other in a pattern transferred from the light transmitting patterns to the mold.

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Seoul, South Korea

Dong-il Bae