Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Hynix Semiconductor Inc.

Seoul National University

Dong-Hyuk Lim

Jae-Jin Park

Hyeon-Deuk Hwang

Dae-Young Chung

Myung-Jae Jung

Deog-Kyoon Jeong

Suhwan Kim

Seung-Hoon Lee

Ic-Su Oh

Dong-Seok Lee

Woo-seok Kim

Woo-Yeol Shin

A lock-in amplifier includes a clock signal generator configured to generate a first demodulation clock signal and a second demodulation clock signal having a phase difference of 90 degrees and a same demodulation frequency; and a detector configured to, based on an input signal, the first demodulation clock signal, and the second demodulation clock signal, provide an offset voltage corresponding to an offset of the lock-in amplifier in a first operation mode, and provide a first output voltage and a second output voltage, each of which correspond to a demodulation frequency component of the input signal in a second operation mode.

Lock-in amplifier, integrated circuit and portable measurement device including the same

Disclosed is a method of manufacturing an adhesive film including: preparing a transparent adhesion layer, disposing a film mask including a light-transmitting region and a light-shielding region on the transparent adhesion layer, applying ultraviolet (UV) light to the transparent adhesion layer through the film mask to precure an area of the transparent adhesion layer corresponding to the light-transmitting region of the film mask, and cutting the precured area of the transparent adhesion layer.

Adhesive film and method of manufacturing the same and display device including the adhesive film

An edge detector includes a differential signal generator, a sense amplifier and a latch. The differential signal generator delays an input signal to generate a first differential signal and inverts the input signal to generate a second differential signal. The sense amplifier amplifies a difference between the first differential signal and the second differential signal to generate a first amplification signal and a second amplification signal at a first edge of a test clock signal and resets the first amplification signal and the second amplification signal at a second edge of the test clock signal. The latch generates an edge signal corresponding to edge information of the input signal in response to the first amplification signal and the second amplification signal.

Edge detectors and systems of analyzing signal characteristics including the same

An adhesive includes an acrylic copolymer synthesized from a composition including a solution polymerizable acryl-based monomer, a vinyl-based monomer that is copolymerizable with the solution polymerizable acryl-based monomer, a &#x3b2;-carboxylethyl acrylate monomer, and a reaction initiator, and a compound including at least three epoxy functional groups.

Adhesive, adhesive tape, and display device

A delay cell includes a first transistor and a second transistor, at least one of which has a fully depleted silicon-on-insulator (FD-SOI) structure. A first control voltage is applied to the body of the first transistor and a second control voltage is applied to the body of the second transistors in order to adjust the delay time of the delay cell. DLL and PLL circuits includes this type of delay cell.

Delay cell, delay locked look circuit, and phase locked loop circuit

A bus system includes a plurality of stubs; a plurality of connectors, each of which is serially coupled between a corresponding one of the stubs and a corresponding one of memory modules; a plurality of first serial loads, each of which is serially coupled to a corresponding one of the connectors; and a plurality of second serial loads, each of which is serially coupled to characteristic impedance of a transmission line of a corresponding one of the stubs, wherein the first and the second serial loads are determined to be impedance matched at each transmission line terminal of the stubs.

Growing community of inventors

Seoul, South Korea

Dong-Hyuk Lim