Yonsei University

Skhynix Inc.

Hynix Semiconductor Inc.

Dong-Hoon Jung

Seong-Ook Jung

Kyung-Ho Ryu

Byoung-Chan Oh

Jin-Hyuk Kim

Jung-Hyun Park

Kyungho Ryu

Seung-Han Woo

Kwang-Seok Kim

A voltage converter includes a power supply circuit configured to generate an output voltage based on an input voltage in response to a control signal, and a power supply control circuit configured to generate the control signal based on a reference clock signal and the output voltage.

Voltage converter

A delay locked loop includes a variable delay line circuit configured to delay a pulse selection circuit output to generate an output signal, a delay model circuit to delay the output signal to generate a first feedback signal, a first phase comparator circuit to control the variable delay line circuit according to the input signal and the first feedback signal, a pulse generation circuit to generate a pulse signal according to the input signal and the first feedback signal, a pulse retainer circuit to delay the output signal to generate a second feedback signal, a pulse selection circuit to select the pulse signal generated by the pulse generation circuit or the second feedback signal as the pulse selection circuit output during the tracking operation, and a second phase comparator circuit to control the variable delay line circuit according to the pulse selection circuit output and the output signal.

Delay locked loop

Provided is a delay locked loop (DLL) including a ring oscillator (RO) including a delay line to delay a reference clock signal and generate a delayed clock signal, wherein the RO circulates, through the delay line, a feedback clock signal corresponding to the delayed clock signal to synchronize N cycles of the feedback clock signal with a cycle of the reference clock signal (where N is an integer number equal to or larger than 2); and a first frequency divider dividing the frequency of the delayed clock signal by 1/N (where N is an integer number equal to or larger than 2) to generate an output clock signal.

Delay locked loop and method of generating clock

A temperature sensing circuit includes a signal generation unit including a delay line and generating a source signal with a pulse width corresponding to a delay value of the delay line, a pulse width expansion unit configured to generate a comparison signal by expanding a pulse width of the source signal, and a change detection unit configured to sense a temperature change using a difference between the pulse widths of the comparison signal and a reference signal.

Temperature sensing circuit

Growing community of inventors

Seoul, South Korea

Dong-Hoon Jung