Samsung Electronics Co., Ltd.

Dong Gi Lee

Han Bin Yoon

Ramdas P Kachare

Fred Worley

Yeong-Jae Woo

Hyuck-Sun Kwon

Ajay Sundar Raj

Young Kug Moon

Kwang Ho Kim

Jun-Ho Jang

Jong Hwa Kim

Sil Wan Chang

Il Su Han

Sang Kyoo Jeong

Dae-Kyu Park

Hee Won Lee

Mi Kyoung Jang

Bum Seok Yu

Kyoung Il Bang

Seung Kyung Ro

Hyun Ko Oh

Hye Ry No

Jin Baek Song

Dong Hoo Lim

Hyuvk-Sun Kwon

A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

Differentiated storage services in ethernet SSD

A method of low-latency direct data access to non-volatile flash memory in at least one NVMe-oF SSD device connected over Ethernet. The method includes transmitting, from a low-latency direct access (LL-DAX) block storage software layer at a host, a remote direct memory access (RDMA) write request to the flash memory. The RDMA write request includes data, a storage address, a length of a data transfer operation, and an operation code. The method also includes receiving, at the host, an RDMA level acknowledgement indicating that the data has been persisted to the flash memory. The method also includes transmitting, from the LL-DAX block storage software layer, an RDMA read request to the flash memory that includes a storage address, a length of a data transfer, and an operation code. The method also includes receiving, at the host, data packets from the flash memory corresponding to the RDMA read request.

Low latency direct access block storage in NVME-of ethernet SSD

A storage device and a refresh method thereof are provided. The storage device includes at least a first processing core configured to operate by receiving a first power from a host, a second processing core separate from the first processing core, at least a first three-dimensional (3D) flash memory, a power module and a retention management module supplied with a second power from the power module when the first power is not supplied from the host. The retention management module is configured to refresh a part of the first 3D flash memory using the second processing core. The retention management module is configured to be woken up at intervals of a first period to refresh the part of the first 3D flash memory.

Storage device and refresh method thereof

A characteristic data pre-processing system includes a data acquisition device that collects characteristic data including first cell distribution data defined according to first default read levels, and second cell distribution data defined according to second default read levels, a data pre-processing apparatus that merges the first cell distribution data and the second cell distribution data according crop ranges to generate training data, wherein the crop ranges are defined according to the first default levels and the second default levels, and a database that stores the training data communicated from the data pre-processing apparatus.

Pre-processing system, method processing characteristic data, and memory control system using same

An external storage device and method of setting a reference frequency for the same are provided. The external storage device includes: a device manager configured to set a reference frequency using information about the reference frequency for a high-speed mode received in a low-speed mode after the external storage device starts initialization, and control the external storage device to operate at the reference frequency in the high-speed mode, wherein the external storage device is a removable device which is attachable to and detachable from a host and is configured to operate according to a reference clock signal with the reference frequency in the high-speed mode.

External storage device and method of setting reference frequency for the same

A semiconductor storage device and a method of throttling performance of the same are provided. The semiconductor storage device includes a non-volatile memory device configured to store data in a non-volatile state; and a controller configured to control the non-volatile memory device. The controller calculates a new performance level, compares the calculated performance level with a predetermined reference, and determines the calculated performance level as an updated performance level according to the comparison result.

Semiconductor storage device and method of throttling performance of the same

A method and apparatus to interface a semiconductor storage device and a host in order to provide performance throttling of the semiconductor storage device. In the method, the semiconductor storage can receive a setting request command from the host. The semiconductor storage device sets a performance throttling parameter to a particular value in response to the setting request command. The semiconductor storage device can send to the host a setting response signal indicating completion of the setting of the performance throttling parameter.

Method and apparatus to interface semiconductor storage device and host to provide performance throttling of semiconductor storage device

A semiconductor storage device and a method of throttling performance of the same are provided. The semiconductor storage device includes a non-volatile memory device configured to store data in a non-volatile state, and a controller configured to control the non-volatile memory device. The controller calculates a new performance level, compares the calculated performance level with a predetermined reference, and determines the calculated performance level as an updated performance level according to the comparison result.

A semiconductor storage device (SSD) and a method of throttling performance of the SSD are provided. The method can include includes gathering at least two workload data items related with to a workload of the semiconductor storage device, estimating the workload using the at least two workload data items, and throttling the performance of the semiconductor storage device according to the estimated workload. Accordingly, a workload that the semiconductor storage device will undergo can be estimated.

A semiconductor storage device and a method of throttling performance of the same are provided. The semiconductor storage device includes a non-volatile memory device, and a controller configured to receive a write command from a host and program and to write data received from the host to the non-volatile memory device in response to the write command. The controller inserts idle time after receiving the write data from the host and/or after programming the write data to the non-volatile memory device.

A data retention method that includes sampling a plurality of nonvolatile memory devices included in a data storage device to detect retention information for each of the nonvolatile memory devices in response to a request of a host and outputting, from the data storage device to the host, sampling data based on a result of the sampling, determining, at the host, whether to perform a retention operation on each of the nonvolatile memory devices based on the sampling data, and performing the retention operation on each of the nonvolatile memory devices based on a result of the determination.

Data storage system and a data retention method thereof

An error correction device is provided. The error correction device includes a code storage unit where a plurality of error correction codes are stored, a first error correction unit to correct a data error detected from input data by using one of a plurality of error correction codes and to output correction data, a buffer to store the correction data, and a second error correction unit to generate a new correction code from the correction data, to compare another of a plurality of error correction codes with the new correction code and to output a comparison result.

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Yongin-si, South Korea

Dong Gi Lee