Samsung Electronics Co., Ltd.

Dong-Chul Choi

Han-Kyul Lim

June-Hee Lee

Nam-Hyun Kim

Sung-Ho Kang

Gun-Il Kang

Byung-Wook Cho

Bong-Kyu Kim

A device for generating restoration data by descrambling scramble data includes a linear feedback shift register configured to receive a first clock including a plurality of edges and sequentially generate a plurality of seeds including first to N&#x2212;1th seeds (where N is a natural number of 2 or greater) respectively corresponding to first to N&#x2212;1th edges among the plurality of edges, a seed calculator configured to calculate an Nth seed corresponding to an Nth edge among the plurality of edges by using the first seed, and a descrambler configured to descramble the scramble data by using the plurality of seeds generated by the linear feedback shift register and the Nth seed calculated by the seed calculator. The linear feedback shift register is further configured to generate an N+1th seed by using the Nth seed.

Device for restoring data by using a linear feedback shift register and data tranceiving system including the device

A clock switch device includes a controller and a switching circuit. The controller sets a clock switch period using a control signal when a logic level of a mode signal is changed. The switching circuit receives a first clock signal, a second clock signal and an auxiliary clock signal. The switching circuit, based on the control signal, outputs one clock signal between the first clock signal and the second clock signal as a glitch free clock signal before the clock switch period, stops outputting the one clock signal and outputs the auxiliary clock signal as the glitch free clock signal during the clock switch period, and stops outputting the auxiliary clock signal and outputs another clock signal between the first clock signal and the second clock signal as the glitch free clock signal after the clock switch period.

Clock switch device and system-on-chip having the same

A display interface system includes a display transmitter and a display receiver. The display transmitter transmits a control pattern having image type information about a type of an image to be displayed and selectively transmits image data according to the type of the image to be displayed. The display receiver receives the control pattern and selectively receives the image data based upon the image type information, reducing power consumption.

Display interface system, display device and display system

A deserializer including a plurality of registers, a sync detector, and a lost bit storage unit. If there is a phase difference between an external input data packet and a recovery clock signal transmitted together with the data packet, the sync detector generates an activated sync detect signal. The lost bit storage unit detects a data bit of the data packet corresponding to an activation point of the sync detect signal. The deserializer recovers the data packet by combining the detected data bit with the data packet.

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Yongin-si, South Korea

Dong-Chul Choi