Samsung Electronics Co., Ltd.

Dong-cho Maeng

Soon-ho Kim

Jun-hwan Oh

Jung-ho Kang

Hyung-Moo Park

Hyae-Ryoung Lee

Kwang-yul Lee

Sung-man Whang

Jong-sub Hwang

Ho-woo Park

A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes a lower wire, an interlayer insulating film formed on the lower wire and having a via hole exposing the upper surface of the lower wire, a diffusion barrier formed on the inner wall of the via hole, and an upper wire filling the via hole and directly contacting the lower wire, in which a dopant region containing a component of the diffusion barrier is formed in the lower wire in the extension direction of the via hole.

Method of fabricating a semiconductor device with a dopant region in a lower wire

Semiconductor device with a dopant region in a lower wire

In a method of fabricating a metal oxide semiconductor (MOS) transistor with a lightly doped drain (LDD) structure without spacers, gate electrodes and spacers are formed on a semiconductor substrate. A high density source/drain region is formed using the gate electrodes and the spacers as masks. A low density source/drain region is formed after removing the spacers. It is possible to reduce the thermal stress of the low density source/drain region by forming the high density source/drain region before the low density source/drain region is formed and to increase an area, in which suicide is formed, by forming a structure without spacers. Also, it is possible to simplify processes of fabricating a complementary metal oxide semiconductor (CMOS) LDD transistor by reducing the number of photoresist pattern forming processes in the method.

Method of fabricating metal oxide semiconductor transistor with lightly doped impurity regions formed after removing spacers used for defining higher density impurity regions

A chemical bath of an overflow-type includes an inner bath which includes a plurality of holes on its sidewalls. The holes are formed in such a manner that they are spaced apart from the upper end of the inner bath at a predetermined distance. In this chemical bath, the chemical in the inner bath flows over the upper end of the inner bath into the outer bath and is simultaneously is discharged to the outer bath through the holes. Accordingly, unless either of the opposed sidewalls slopes lower than another by over a predetermined value, the chemical can flow continuously at nearly the same rate at both sidewalls of the inner bath. This reduces the difference of the etching rate between the respective wafers caused by the difference of the position of the wafers immersed in the chemical in the inner bath and leads to an improvement in the reliability of the etching process.

Chemical bath having a uniform etchant overflow

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Yongin-si, South Korea

Dong-cho Maeng