Precision Monolithics, Inc.

Precision Microdevices Inc.

Donald T Comer

Daniel J Dooley

John A Schoeff

George Erdi

Paul Raymond Henneuse

An improved circuit, and an improved device geometry for trimming element values in an integrated circuit employs selectable short-circuiting of fusible elements by means of application of a prescribed sequence of electrical waveforms of prescribed amplitude and polarity. The improved trim circuit configuration offers the possibility of improved trim circuit density by allowing selection of three trim elements from a single contact pad, in conjunction with a common contact pad, for each trim circuit. Replication of the circuits allows extension of the range of adjustment or of the resolution of the trim, at the expense of only one additional pad per each additional trim circuit. A unique device geometry is described for implementing the improved trim circuit within a single isolation pocket of an integrated circuit.

Apparatus for multiple link trimming in precision integrated circuits

A simplified temperature stabilized circuit provides a current which is proportional to a variable voltage by the use of branching transistor circuitry which fixes the voltage level of the supplied current, and controls its magnitude. The variable voltage is supplied through a reference resistor to the emitter of a first junction transistor having its base connected to the base of an identical junction transistor having its emitter grounded, thereby fixing the input voltage to the first transistor at a virtual ground potential. A third identical transistor has its base and emitter connected in parallel with the first transistor and carries an equal amount of current. Current derived in parallel from the first and second transistor is positively proportioned relative to the current flowing in the collector path of the third transistor by a pair of mirror-connected transistors having suitable relative areas and load resistors. The desired temperature stabilized current is applied from the bases of the mirrored transistors to the ladder network of a digital to analog converter. Two cascaded digital-to-analog circuits of this type provide a stable analog output voltage proportional to the product of the two numbers represented by the binary inputs.

Voltage to current conversion circuit

The outputs of individual stages in a digital to analog converter are each trimmed by independent circuitry which includes a plurality of transistors connected to a common output terminal, the physical dimensions of each transistor being scaled in proportion to desired levels of current flow, and selectable switches connected in circuit with each of the transistors. Selectable switches are actuable to produce an output trimming current of a desired magnitude, which current is used to correct the untrimmed stage output. The invention includes circuitry for controlling the polarity of the trimming current relative to the stage, and for selectively expanding or contracting the trimming range to optimize the trimming currents for the particular characteristics of the converter. A favorable balance between trimming accuracy and the area occupied by the trimming circuitry is attained by the use of both emitter-scaled and multicollector transistors in the trimming circuits.

Selectable trimming circuit for use with a digital to analog converter

Novel apparatus is described for controlling the application of circuit adjustment signals to an electrical circuit device. The same device leads are used in an operating mode with input signals in a first range, and in an adjustment mode with input signals in a second range, the two ranges being mutually exclusive. An exemplary embodiment is directed toward trimming a digital to analog converter. A plurality of trimming elements are provided with an equal number of two-terminal actuating devices, which are arranged in a matrix such that each pair of terminals is connected in circuit with a unique pair of input leads. The devices actuate their associated trimming elements in response to the application of actuating signals, exceeding a threshold level greater than the level of the binary input signals, to their respective lead pairs. The leads are thereby capable of a dual mode operation, with one mode for normal converter operation and the other mode for setting up desired trim circuits.

Trimming control circuit for a digital to analog converter

A digital to analog converter with bit circuits arranged in binary order, in which a supplemental current circuit is added to selected bit circuits to enable convenient and efficient conversion from binary to BCD operation. Supplemental BCD currents are controlled by a bias circuit which automatically increases the BCD bit circuit bias to a level at which the full-scale BCD output current is substantially equal to the full-scale binary output current.

Digital to analog converter with binary and binary coded decimal modes

There is disclosed a dual mode amplifier for use as the output amplifier of a sample and hold circuit. The dual mode amplifier described by the invention is controlled by a sample and hold gate. In one of its modes the characteristics of the amplifier are optimized for best slew rate and transient performance, while in the other mode the amplifier characteristics are optimized for settling time.

Dual mode output amplifier for a sample and hold circuit

A circuit for interfacing a digital to analog converter with input signals from three different logic systems, whereby appropriate threshold switching signals compatible with each logic system are presented to the converter when the proper logic control signal is applied to the circuit. The first logic system is characterized by logic control signals within a first voltage range, and switching thresholds which differ from the logic control signals by a fixed increment; the second system by logic control signals within a second voltage range higher than the first range, and switching thresholds equal to a fixed proportion of the logic control signal; and the third system by a substantially constant switching threshold for a predetermined positive supply voltage level.

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Los Gatos, CA, United States of America

Donald T Comer