International Business Machines Corporation

Donald Lloyd Pierce

Ann C Merenda

Kevin Roy Griess

Thomas Allen Hendrickson

Robert W Roefer

George C Macauley

Alan B Strickland

A mechanism for handling processing errors in a computer system. The mechanism includes a first means for processing a stream of instructions, second means for detecting an error caused by a timing dependant defect and occurring during processing of the instruction by the first means and third means for varying the instruction processing cycle time of the first means in response to the detection of the error by the second means, and for causing the second means to retry at least a portion of the instruction subsequent to the varying. In a preferred embodiment, the mechanism uses the variable frequency oscillator, controlled by recovery code, to increase the system clock cycle time by a specified time (Textend) following what has been determined to be a critical fail and after normal retry has been unsuccessful. The increased cycle time extends the net slack and, thereby, provides tolerance to certain AC (path delay) defects which have developed in any cycle time dependant latch to latch segment. The time (T) is chosen based on maximum cycle time restrictions resulting, for example, from the pipelining of data in system cables.

Fault tolerant design for identification of AC defects including variance of cycle time to maintain system operation

Fault tolerant design for identification of AC defects including

A peripheral processor has an architecture wherein the function controlling information of a program is separated from portions of the sequence of execution controlling information and each are stored in the form of tables. The function controlling information takes the form of a table including a plurality of function specifying entries. The function execution sequence controlling information takes the form of a table of pointers. In this invention, function controlling entries, each having a plurality of fields for defining, modifying, and specifying the functions and related data to be executed, need not be repetitively duplicated throughout the program. Instead, the shorter pointers to the function table entries can be provided in the sequence table in the sequence in which the functions are to be executed. In a keyboard display controller application, further economy of storage is obtained by retaining a first level of function specifying information in the sequence table in the form of a bit identifying whether the function to be executed is a complex function, in which case the pointer identifies an entry in the function control statement table, or whether the function to be executed is merely the display of information on the display, in which case the pointer in the sequence table entry specifies an entry in a guidance table.

Interactive transactions processor using sequence table pointers to

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Hyde Park, NY, United States of America

Donald Lloyd Pierce