Bell Telephone Laboratories

Donald L Fraser, Jr

Michael F Tompsett

Armando J Vera

San-Chin Fang

An input differential amplifier stage (10), which feeds an output stage (20), has a feedback loop originating at a node (N.sub.1) in one branch, for controlling the current-source transistor (M.sub.5) of that stage. The feedback loop is characterized by a direct connection to the gate electrode of a transistor (M.sub.8) which drives the output stage (20), while the output at another node (N.sub.2), in the other branch of the differential amplifier stage (10) is fed to another transistor (M.sub.9) which also drives the output stage (20).

Semiconductor differential amplifier circuit with feedback bias control

A switched capacitor filter circuit which closely matches single pole RC filters at voice frequency. The filter pole is determined by the ratio of a first and second capacitor (C.sub.1 and C.sub.2). Any resulting loss is compensated for by an operational amplifier (13) in combination with third and fourth capacitors (C.sub.3 and C.sub.4) operating as a voltage divider circuit. A switch (16) may be provided for discharging one of the latter capacitors during nonsampling intervals. A further switch (17) may also be provided to cancel charge due to gate-to-drain overlap of the first switch.

Switched capacitor filter

A number of known circuit configurations require high-ratio-accuracy capacitors. Maintaining such ratios during the various processing steps involved in fabricating the configurations in integrated-circuit form has been found to be difficult. In accordance with this invention, ratio capacitors are made in integrated-circuit form utilizing a unique geometry. In one specific embodiment, a so-called H-section geometry that is largely insensitive to processing variations is utilized to form the capacitors. In this way, high-yield low-parasitic precisely matched pairs of ratio capacitors are achieved.

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Warren Township, NJ, United States of America

Donald L Fraser, Jr