Ncr Corporation

Donald J Girard

Robert R O'Dell

William Martin Belknap

Don C Finfrock

Albert J Chanasyk

Daniel B Seevers

John K Burkey

Gene R Mathes

Barry D Briggs

John F Paugstat

Frank Hines

Russell K Kelch

A multiple mode switching device is disclosed which is capable of interconnecting either one of a first or second apparatus, such as a controller, to a third apparatus such as a modem or a business terminal, and which is capable of operating in a first mode in which either the first apparatus or the second apparatus can be manually selected for connection to the third apparatus; in a second mode in which either the first apparatus or the second apparatus can request connection to the third apparatus and will retain such connection as long as needed; and in a third mode in which a selected one of the first apparatus and the second apparatus has priority and will always obtain and retain connection to the third apparatus when needed. First and second manually controlled switches are provided for selecting the mode and the desired apparatus in the manual mode. Logic circuitry is provided for controlling the operation of the switching device in the second and third modes of operation.

Multiple mode switching means

A data processing system which includes a host processor and a plurality of remote processing devices which are coupled to a common communication channel. The system also includes a look-up table storing the sets of instructions for a plurality of communication protocols for use with the remote processing device and a controller associated with one of the remote processing devices. A selectively actuated switch member located in the controller provides an address for the controller. During a power-up operation, the controller address is transmitted to the host processor for use in addressing the look-up table to obtain the communication protocol for the controller. This information is then loaded into the controller for controlling the transfer of data between the host processor and the remote processing device.

Multicommunication protocol controller

A communication interface for controlling the transfer of data between a host processor configured to process data of a first length and a remote storage member configured to store data of a second length includes a bus controller for transferring data between the interface and the remote storage member, a data transfer member for controlling the transfer of data between the host processor and the interface, and a control processor for controlling operating of the bus controller and the transfer member. A first storage member stores data words of said second length and sequentially outputs the data words over a communication bus to the host processor configured to transmit data words of said first length. A second storage member stores data representing the operating status of the transfer member and the bus controller, enabling the control processor to monitor the status of the transfer member and the bus controller.

Communication bus interface

A data processing system in which a host processor is connected to a plurality of remote processing devices over a common communication channel in which a number of the remote processors are commonly connected to a transceiver for transmitting and receiving data over the communication channel. Switching members on each of the remote processing devices select a pair of communication lines coupled to a priority resolving circuit for transmitting request to send signals and receiving clear to send signals, thereby enabling the remote processing devices to transmit and receive data over the communication channel.

Local area network processing system

A system for controlling the transfer of a data message over a common communication channel between a plurality of processing devices includes a MOS/LSI controller chip associated with each processing unit for constructing a message to be sent to a sending device acknowledging the receipt of the message and the validity of the message. Logic circuits are included which generate a predetermined sequence of two binary bits indicating the receipt of the message and the validity of the receiving message. The binary bits are framed by two other binary bits and the sequence repeated a predetermined number of times to construct an acknowledgment message. The controller chip further includes logic circuits for decoding the acknowledgment message.

Data transmitting and receiving apparatus

A method for polling a plurality of remote processing units includes establishing a table of active and inactive remote processing units, sequentially polling each of the active processing units, at the conclusion of polling the active processing units, polling an inactive processing unit after which all of the active processing units are again polled. This sequence is repeated until all the active and inactive processing units have been polled. If in polling a processing unit, a response to the poll message indicates a change of status of the polled processing unit has occurred, the table is accordingly updated to reflect the current status of the processing unit.

Polling method for data processing system

A system for controlling the flow of data over a common bus between a plurality of processing units is disclosed which preferably includes a MOS/LSI circuit controller chip associated with each processing unit for awarding priority of access to the common bus when two or more processing units attempt to simultaneously gain access to the common bus. A contention circuit located in each controller chip is responsive to the sensing of each bit in the address of its associated processing unit, and generates a plurality of transitions on the common bus during the time a binary one bit is sensed in the address and listens for the presence of any transition on the common bus during the time a binary zero is sensed in the address. Access to the common bus is lost when transitions are detected on the bus during the time a binary zero bit is sensed and acquired when no transitions have been detected at the completion of the sensing of the address of the requesting processing unit.

Method and apparatus for establishing priority between processing units

A system and apparatus for compressing a binary data message generated by a digital input device is disclosed wherein a data message generated in a data terminal device as part of a merchandise transaction is examined on the basis of information content with all data relating to redundant information previously generated or known being deleted together with encoding of preselected portions of the non-redundant data results in the compression of the data to a minimum amount without losing the informational content of the original data thereby allowing the compressed data to be stored in a relatively small storage unit located in the data terminal device. A compressed data record is generated including an encoded start of record character which may signify, in addition to the start of the compressed data record, the type of merchandise transaction being processed. Other non-redundant data which can be determined by knowing the corresponding data of a previous data message are also deleted with only that data required in order to reconstruct the original data generated being retained in the storage unit.

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Cambridge, OH, United States of America

Donald J Girard