International Business Machines Corporation

Donald J Ashley

Michael Joseph Johnson

Mark K DeMoor

Randhir Singh Malik

Paul W Graf

David R Thomas

Leonard J Hitchcock

Donald Victor Folker

James Edward Harvey

A power converter comprises a first printed circuit board containing some of the circuitry of the power converter, a header comprising a support structure and a multiplicity of metallic pins passing through the support structure, and an inductor mounted to the support structure and including wires connected to respective pins. Portions of the pins on one side of the support structure are mounted to the first printed circuit board to support the header in fixed offset relation to the first printed circuit board. Portions of the pins on an opposite other side of the support structure are adapted to mount to a second, mother board to support the header in fixed offset relation to the mother board. Some of the pins carry a first DC/DC voltage from the mother board to the first printed circuit board, other of the pins electrically interconnect the inductor to the first printed circuit board as part of the power converter, and still other of the pins carry a second, output DC voltage from the first printed circuit board to the mother board.

Printed circuit board with header for magnetics all mounted to mother

Two controlled current gate drives are provided for driving parallel P and N channel pass devices, so that the rise time of the voltage at one gate of the pass devices overlaps with the fall time of the other to reduce capacitive signal coupling of the signal applied to an FET gate to the FET source and drain. Low-level current sources drive the gates of the pass devices with opposite polarities. A current mirror is used to control the currents provided by the gate drives to control the tradeoff between switching speed and switching noise coupling.

Electronic switch having programmable means to reduce noise coupling

A load transistor is integrated into a region of a semiconductor layer. The load transistor has an on-resistance which passes the load current. One or more drain pilot transistors are also integrated into the same region of the semiconductor layer such that the load transistor substantially surrounds the pilot transistor(s). Consequently, as the load transistor heats-up due to the load current, the heat from the load transistor conducts to the pilot transistor(s) and heats the pilot transistor(s) to substantially the same temperature as the load transistor. If more than one drain pilot transistor are provided, then they are located adjacent to each other to ensure that all the pilot transistors exhibit substantially the same temperature as each other. The pilot transistor(s) are scaled models of the load transistor such that an on-resistance of each of the pilot transistors varies proportionally to the on-resistance of the load transistor with temperature. Current sources supply fixed currents to the on-resistances of the respective pilot transistors. Consequently, voltage(s) developed across the pilot transistor(s) are accurate references with which to set a drive voltage for the load current or an overcurrent or undercurrent detector, which reference voltages are temperature compensated.

Temperature monitoring pilot transistor

A matched pair of npn transistor configured as emitter followers provide high impedance isolation for input error voltage busses in the current share circuitry used with parallel connected current programmed dc to dc converters. The matched emitter followers offer the bus isolation of buffer amplifiers but do not add the detrimental offset voltage to the input error signals. Trimmable current sinks are connected to the emitters of the transistors to guarantee equal VBE drops. Slight intentional unbalancing can be introduced using the current sources to improve stability. The current share circuitry equalizes main FET switching currents not load currents reducing FET stresses. A programmable differential amplifier is provided which can accommodate different regulator output voltages. Diagnostic circuitry monitors share circuitry operation.

Current share circuit for DC to DC converters

A slope compensation circuit for use with current-programmed switching DC to DC converters is provided which allows operation of the switching converters in the 1-2 MHz range. The circuit avoids feedback of an output voltage which includes the effects of a partially discharged slope capacitor without adding unnecessary delay by using a switch to bypass the discharging slope capacitor and coupling an input stage of the slope compensation circuit to an output driver. A delay in feeding back the output of the slope compensation circuit is provided to assure that the bypassing switch has settled.

High frequency slope compensation circuit for current programmed

A temperature compensated overcurrent and/or undercurrent detector monitors current through a solenoid or other load and signals when the load current exceeds an upper limit or falls below a lower limit. Such a signal may indicate a failure of another circuit which supplies the load current via a load transistor. This other circuit which supplies the load current is temperature compensated, and likewise the detector is temperature compensated so it can be set to signal an overcurrent or undercurrent condition when the load current varies a small amount from a predetermined range. The load transistor has an on-resistance which passes the load current and varies with temperature. The temperature compensation for the detector is provided in part by two pilot transistors which are integrated with the load transistor such that as the load transistor heats-up due to the load current passing through the on-resistance, the pilot transistors heat-up due to heat conduction from the load transistor. Each pilot transistor also has an on-resistance which varies proportionally or similarly to the on-resistance of the load transistor. A current source is coupled to the on-resistance of each pilot transistor to generate reference voltages above and below the acceptable range of voltages sensed by the sensor representing an acceptable range of load currents.

Temperature compensated overcurrent and undercurrent detector

A temperature compensated control circuit includes a load transistor which passes the load current and has an on-resistance which varies with temperature. To provide temperature compensation, first and second pilot transistors are integrated with the load transistor such that as the load transistor heats-up due to the load current passing through the on-resistance of the load transistor, the first and second pilot transistors heat-up due to heat conduction from the load transistor. Each of the pilot transistors has an on-resistance which varies proportionally or similarly to the on-resistance of the load transistor. A first current source supplies a first level of current to the on-resistance of the first pilot transistor to develop a first reference voltage, and a second current source supplies a second level of current to the on-resistance of the second pilot transistor to develop a second reference voltage. The range between the first and second reference voltages corresponds to an acceptable range of load current. A voltage corresponding to the load current is sensed across the load transistor, and the control circuit controls the load current to maintain the sensed voltage within the range.

Temperature compensated circuit for controlling load current

A power supply system, which supplies a number of different A.C. and D.C. voltage levels to a plurality of loads, is monitored at a number of points for undervoltage, overvoltage and/or overcurrent fault conditions. A diagnostics logic circuit, which is formed from relatively inexpensive, readily available logic units, generates a BCD code signal indicating a fault in response to the occurrence of a fault condition at one of the monitored points. The system responds to this BCD fault indicating code signal by, on the one hand, protecting the power system by actuating a main relay to open the A.C. power line to the system and generating a shutdown signal applied to a pulse width modulator of a converter in the system and, on the other hand, by driving a seven-segment display which displays a numeral to indicate the location of the fault condition. In order to avoid false undervoltage fault signals while the system voltages are coming up after the system is turned on, a delay circuit is used to mask the BCD code generating portion of the diagnostics logic until the system voltages reach normal operating levels.

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Endicott, NY, United States of America

Donald J Ashley