International Business Machines Corporation

Other

Donald G McBride

Charles E Gazdik

Robert G Rickert

Voya Rista Markovich

Alfred Viehbeck

Terrence Robert O'Toole

Martin J Goldberg

Donald P Seraphim

Elizabeth F Foster

Stephen L Tisdale

Harry R Bickford

Linda C Matthew

Michael J Canestaro

Peter J Duke

Ronald J Moore

Ronald A Kaschak

Theron L Ellis

Louis J Konrad, Iii

Patrick A Toole

Jane M Shaw

John A Welsh

William J Amelio

Eugene P Skarvinko

Robert J Clementi

Robert J Capwell

William Lafer

Philip Harold Pallady

Joel V Munson

Roy L Lovesky

David W Hume

A structure including a halogenated polymeric-containing layer. At least a portion of a surface of the halogenated polymeric-containing layer is electrochemically reduced. An electrically conductive pattern is provided over at least a portion of the electrochemically reduced portion of the halogenated polymeric-containing layer.

Structure including a partially electrochemically reduced halogenated

The present invention features a method and an article of manufacture for directly attaching silicon chips to circuit carriers. Both the method and the article of manufacture feature a dissolvable, thin wafer that is soldered first to the chip and then to the circuit board, completing the connection. The wafer article consists of embedded, spaced-apart, flexible wires that fit the connection footprints of both the chip and the carrier board. The wafer is fashioned from a matrix block having a heat-resistant, dissolvable substance which encapsulates the wires. The matrix is cut into thin slices that are wafer-thin. Each slice or wafer of the matrix carrier is then attached to a chip, using solder with an appropriate melting temperature that is thermally compatible with the chip. The solder attaches one end of the embedded wires to the chip. The other end of the wafer's wires are then matched and soldered to the wire footprint of the circuit board, using another type of solder that melts at a temperature thermally compatible with the circuit board. Afterwards, the dissolvable, encapsulating material is removed from the body of the wafer, leaving the chip attached to the circuit carrier by only the remaining, interdisposed, flexible wires. In this way a 'packageless' package or an 'air/copper' package is fabricated.

Direct attachment of silicon chip to circuit carrier

The present invention features a method and an article of manufacture for directly attaching silicon chips to circuit carriers. Both the method and the article of manufacture feature a dissolvable, thin wafer that is soldered first to the chip and then to the circuit board, completing the connection. The wafer article consists of embedded, spaced-apart, flexible wires that fit the connection footprints of both the chip and the carrier board. The wafer is fashioned from a matrix block having a heat-resistant, dissolvable substance which encapsulates the wires. The matrix is cut into thin slices that are wafer-thin. Each slice or wafer of the matrix carrier is then attached to a chip, using solder with an appropriate melting temperature that is thermally compatible with the chip. The solder attaches one end of the embedded wires to the chip. The other end of the wafer's wires are then matched and soldered to the wire footprint of the circuit board, using another type of solder that melts at a temperature thermally compatible with the circuit board. Afterwards, the dissolvable, encapsulating material is removed from the body of the wafer, leaving the chip attached to the circuit carrier by only, the remaining, interdisposed, flexible wires. In this way a 'packageless' package or an 'air/copper' package is fabricated.

Process for attaching a silicon chip to a circuit board using a block of

A halogenated polymeric material is exposed to a reducing agent and/or an electrolyte and applied voltage to render exposed portions capable of being metallized and of being etched. The exposed portions can also be doped to thereby induce electrical conductivity therein. Also, new structures containing a free standing halogenated polymeric-containing layer and electrical conductive pattern thereon are provided.

Method for conditioning halogenated polymeric materials and structures

A method of treating a halogenated polymeric-containing substrate including exposing at least portions of the halogenated polymeric-containing substrate to a composition containing a reducing agent and an aprotic solvent selected from the group consisting of nitriles, nitro compounds, amides, esters, carbonates, oxides, sulfo compounds and mixtures thereof. The solvent is free of ethers, amines, ammonia. The composition is prepared by reacting a metal with an organic compound selected from the group consisting of polyaryl compounds, aromatic carbonyl containing compounds, aromatic nitriles, and aromatic heterocyclic nitrogen containing compounds in a reaction solvent that does not react with the metal but permits reaction between the metal and the organic compound to thereby provide the reducing agent. The reducing agent is isolated from the reaction solvent to obtain a reaction product as a solid. The reaction product is added to the aprotic solvent. The treated substrate is contacted with a material to promote adhesion of the material to the treated surface.

A device for applying fluid to a substrate which includes a head member having first and second opposed portions adapted for being fixedly positioned relative to each other. The device is particularly suited for treating a substrate as the substrate moves between the first and second portions. Each portion may in turn include a first channel located at a predetermined distance from the substrate for having a first fluid impinge on the substrate at a first velocity. Additionally, each portion may include a weir adjacent the first channel for having fluid pass thereover at an accelerated rate and thus at a greater velocity than the first fluid, this weir being located at a lesser distance than the first channel. Fluid inlet means is coupled to the respective portions to provide the fluid thereto at desired velocities. Significantly, a fluid blocking means (e.g., an elongated bar) is also included as part of the structure for maintaining the fluids at pre-established levels.

Method for treating substrates

Fluid treatment device

The disclosure describes a method of manufacturing a structure of a thin, flexible package assembly that permits electrical devices to be bonded to an electrical circuit utilizing mixed bonding techniques. A sacrificial metal carrier material is used to support a thin polyimide or TEFLON substrate, through which openings, called 'vias', are formed at locations where bonding pad areas are needed to affix electrical devices. An electrical circuit is formed on the thin flexible substrate, including making the vias conductive, utilizing known processes, and then, the sacrificial metal carrier material is removed, as for example by etching it away, except in locations where metal bumps will be needed to bone a device by thermo compression bonding.

Method of marking a thin film package

The disclosure describes a form of packaging for an electronic device and a method of achieving it in order to overcome the problem of damage because of cycles in environmental temperature. A thin, flexible foil functioning as a carrier of electrically conductive material selected from the group including Invar, copper-Invar-copper and Kovar is coated with a preselected polyimide, on which is formed a thin metallized coating of chromium, in the order to 200 Angstroms, and copper, in the order of 80,000 Angstroms.

Flexible carrier for an electronic device

The disclosure describes a method of manufacturing a structure of a thin, flexible package assembly that permits electrical devices to be bonded to an electrical circuit utilizing mixed bonding techniques. A sacrificial metal carrier material is used to support a thin polyimide or TEFLON substrate, through which openings, called 'vias', are formed at locations where bonding pad areas are needed to affix electrical devices. An electrical circuit is formed on the thin flexible substrate, including making the vias conductive, utilizing known processes, and then, the sacrificial metal carrier material is removed, as for example by etching it away, except in locations where metal bumps will be needed to bond a device by thermo compression bonding.

Thin film package for mixed bonding of chips

The disclosure describes a form of packaging for an electronic device and a method of achieving it in order to overcome the problem of damage because of cycles in environmental temperature. A thin, flexible foil functioning as a carrier of electrically conductive material selected from the group including Invar, copper-Invar-copper and Kovar is coated with a preselected polyimide, on which is formed a thin metallized coating of chromium, in the order of 200 Angstroms, and copper, in the order of 80,000 Angstroms. A predetermined electrical circuit is formed out of this metallized coating by a photolithographic process and is connected electrically to the flexible metal foil by vias through the polyimide coating. At least one electronic device is bonded to the electrical circuit at a predetermined location to operate functionally with the circuit, and both the device and the circuit are connected electrically by the vias to the thin, metal carrier which functions as a power plane for the package.

A system for defining a solder barrier using a silylated positive photoresist. This layer replaces the top chrome layer previously employed and defines the C4 and I/O select patterns. The personality pattern in the Cr-Cu layers is defined by the use of a positive photoresist which is etched to provide the copper etch mask. The etched copper is then used to etch the chrome. This avoids the incompatibility of the positive photoresist with the alkaline chromium etchant.

Organic solder barrier

An electronic packaging structure, and a method of making this structure, are disclosed. The electronic packaging structure comprises a full panel, circuitized flexible film semiconductor chip carrier mounted on a circuitized substrate such as a printed circuit board. A plurality of semiconductor chips are mounted on the carrier in a selected pattern, and the carrier, with the chips, is mounted on a matching pattern of bonding sites on the circuitized substrate. Preferably, the circuitized flexible film semiconductor chip carrier is manufactured on a support structure used to facilitate handling of the circuitized flexible film and to facilitate heat transfer from the semiconductor chips mounted on the carrier to a heat sink which is part of the circuitized substrate. Also, the semiconductor chips mounted on the flexible film chip carrier may be tested, and burned in, while on the support structure before the chip carrier, with the chips, is mounted on the circuitized substrate.

Full panel electronic packaging structure

An electronic packaging structure, and a method of making this structure, are disclosed. The electronic packaging structure comprises a full panel, circuitized flexible film semiconductor chip carrier mounted on a circuitized substrate such as a printed circuit board. A plurality of semiconductor chips are mounted on the carrier in a selected pattern, and the carrier, with the chips, is mounted on a matching pattern of bonding sites on the circuitized substrate. Preferably, the circuitized flexible film semiconductor chip carrier is manufactured on a support structure used to facilitate handling of the circuitized flexible film and to facilitate heat transfer from the semiconductor chips mounted on a carrier to a heat sink which is part of the circuitized substrate. Also, the semiconductor chip mounted on the flexible film chip carrier may be tested, and burned in, while on the support structure before the chip carrier, with the chips, is mounted on the circuitized substrate.

Growing community of inventors

Binghamton, NY, United States of America

Donald G McBride