Cree Gmbh

Wolfspeed, Inc.

Lockheed Martin Corporation

Macom Technology Solutions Holdings, Inc.

Donald Farrell

Simon Maurice Wood

Scott Thomas Sheppard

Sung Chul Joo

Dan Namishia

Bradley Millon

Jack Powell

Marvin Marbell

Jeremy Fisher

Allen Katz

James Milligan

Mitchell Flowers

James L Martinetti

Dan Etter

A transistor device includes a metal submount; a transistor die arranged on said metal submount; at least one integrated passive device (IPD) component that includes a substrate arranged on said metal submount; and one or more interconnects extending between the transistor die and the at least one integrated passive device (IPD) component. The substrate includes a silicon carbide (SiC) substrate.

IPD components having SiC substrates and devices and processes implementing the same

A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.

Systems and processes for increasing semiconductor device reliability

Monolithic microwave integrated circuits are provided that include a substrate having a transistor and at least one additional circuit formed thereon. The transistor includes a drain contact extending in a first direction, a source contact extending in the first direction in parallel to the drain contact, a gate finger extending in the first direction between the source contact and the drain contact and a gate jumper extending in the first direction. The gate jumper conductively connects to the gate finger at two or more locations that are spaced apart from each other along the first direction.

High power MMIC devices having bypassed gate transistors

A transistor device includes a source contact extending in a first direction, a gate finger extending in the first direction adjacent the source contact, and a drain contact adjacent the gate finger, wherein the gate finger is between the drain contact and the source contact. The device further includes a gate jumper extending in the first direction, a gate bus connected to the gate jumper and the gate finger, and a gate signal distribution bar that is spaced apart from the gate bus in the first direction and that connects the gate jumper to the gate finger.

Transistor with bypassed gate structure field

A packaged RF transistor device includes an RF transistor die including a plurality of RF transistor cells. Each of the plurality of RF transistor cells includes a control terminal and an output terminal. The RF transistor device further includes an RF input lead, and an input matching network coupled between the RF input lead and the RF transistor die. The input matching network includes a plurality of capacitors having respective input terminals. The input terminals of the capacitors are coupled to the control terminals of respective ones of the RF transistor cells.

RF transistor packages with internal stability network and methods of forming RF transistor packages with internal stability networks

A receive frequency band interference protection system includes an input terminal for receiving an input signal and a dividing coupler coupled to the input terminal. The dividing coupler is configured to divide the input signal into a first signal and a second signal. The system further includes a first signal path and a second signal path. The first signal path includes a delay, and it is coupled to the dividing coupler and configured to receive the first signal. The second signal path is coupled to the dividing coupler and configured to receive the second signal. The second signal path includes an attenuator coupled to the dividing coupler and a predistortion linearizer coupled to the attenuator. The system further includes a combining coupler and an output terminal. The combining coupler is coupled to the first signal path and the second signal path. The combining coupler is configured to obtain a sum of the respective outputs of the first signal path and the second signal path. The output terminal is coupled to the combining coupler and configured to send out the sum.

Receive frequency band interference protection system using predistortion linearization

A packaged RE power device includes a transistor having a control terminal and an output terminal and configured to operate at a fundamental operating frequency, an RF signal input lead coupled to the control terminal, and an RF signal output lead coupled to the output terminal. A harmonic reducer is coupled to the control terminal and/or the output terminal of the transistor and is configured to provide a short circuit or low impedance path from the control terminal and/or the output terminal to ground for signals at an Nth harmonic frequency of the fundamental operating frequency, where N&#x3e;1. The device further includes a package that houses the transistor and the harmonic reducer, with the input lead and the output lead extending from the package. Multi-chip packages are also disclosed.

RF power transistor packages with internal harmonic frequency reduction and methods of forming RF power transistor packages with internal harmonic frequency reduction

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Raleigh, NC, United States of America

Donald Farrell