Micron Technology Incorporated

Donald D Baldwin

Brett L Williams

Todd D Farrell

A memory bus impedance matching module is inserted in each empty memory expansion socket on a computer memory bus to provide a constant impedance on the bus. Impedance devices, such as non-functional memory devices, are mounted on the module housing and coupled to standard bus communication line connections on the module housing. The modules are placed on the memory bus to prevent communication errors without needing to fill each expansion socket with real memory.

Impedance matching device for high speed memory bus

A memory structure includes a memory module divided into low order banks and high order banks. The low order banks are used as conventional memory. The high order banks are used as either conventional memory or ECC memory, depending upon routing of data. In one embodiment, data from the high order banks are routed through a primary multiplexer to a data bus when the high order banks are used as conventional memory. When the high order banks are used as ECC memory, data from the auxiliary section is routed through the primary multiplexer to an error correction circuit. A secondary multiplexer combines ECC bits from the auxiliary section of the module or a dedicated ECC memory on a motherboard. The auxiliary section thus supplements the onboard ECC memory to provide support for an effectively larger ECC memory for use with error intolerant applications that require error correction.

Reconfigurable memory with selectable error correction storage

A system includes a printed circuit board (PCB) having multiple bonding sites and a packaged integrated circuit (IC) having multiple conductive portions for electrically contacting respective bonding sites when the IC is mounted thereon. A portion of the package is formed of a magnetic material. The system also includes a magnet to controllably induce a magnetic field at the PCB having a strength sufficient to attract the magnetic material provided in the IC package and to hold the packaged IC onto the PCB. The system also includes a testing unit for evaluating the PCB and packaged IC while the packaged IC is held onto the PCB by the magnetic field induced by the magnet. The IC package comprises a semiconductor IC chip encapsulated within a casing and a lead frame electrically coupled to the semiconductor IC chip. The lead frame includes the magnetic material.

Apparatus for mounting an integrated circuit onto a printed circuit board and then testing the integrated circuit

An integrated circuit (IC) device is mounted onto a printed circuit board (PCB) by inducing a magnetic field of a selected strength at the surface of the PCB to temporarily hold the IC device onto the PCB. The IC device is provided with magnetic material which is attracted by the magnetic field. The magnetic field is maintained while the IC device and PCB are tested, and then subsequently during soldering when the IC device is permanently bonded to the PCB.

Method for mounting and testing integrated circuits on printed circuit

Method for testing integrated circuits which are on printed circuit

An application-specific integrated circuit (ASIC) for enabling access to memory. ASIC includes a decryptor, a valid authorization storage component, an upgrade verifier, an upgrade storage component, and an enabling component. The decryptor inputs an encrypted authorization code and outputs a decrypted authorization code. The valid authorization storage component stores and outputs a valid authorization code. The upgrade verifier inputs the decrypted authorization code and the valid authorization code, compares the decrypted authorization code to the valid authorization code to determine whether access to the portion of memory is authorized, and outputs a signal to enable access to the portion of memory. The upgrade storage component stores the signal output from the upgrade verifier. The enabling component inputs a memory access signal and a signal stored in the upgrade storage component and outputs a signal indicating whether the portion of memory is enabled.

Growing community of inventors

Boise, ID, United States of America

Donald D Baldwin