Analog Devices,inc.

Analog Devices Global

Analog Devices Global Unlimited Company

Donal Bourke

Dermot G O'Keeffe

Colin Gerard Lyden

Dennis A Dempsey

Tudor M Vinereanu

Patrick C Kirby

Patrick Joseph Pratt

Srivatsan Parthasarathy

Rares Andrei Bodnar

Peter James Tonge

Liam Patrick Riordan

Thomas Paul Kearney

Sirui Luo

Yuanzhong Zhou

Jean-Jacques Hajjar

Camille Louis Huin

Paul Vincent Errico

David Harty

Dermot O'Keeffe

A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N&#x2212;1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2&#x3c0; radians or a multiple thereof, where N is greater than 1.

Control circuit for use with a four terminal sensor, and measurement system including such a control circuit

Fault tolerant switches are provided herein. In certain embodiments, a fault tolerant switch includes a switch, a gate driver, and a clamp. The switch includes a switch p-type field effect transistor (PFET) and a switch n-type field effect transistor (NFET) electrically connected in series and controlled by the gate driver. Additionally, the clamp is electrically connected in parallel with the switch, and includes a forward protection circuit including a first diode and a first clamp FET in series, and a reverse protection circuit including a second diode and a second clamp FET in series. The clamp further includes a first gate bias circuit configured to bias a gate of the first clamp FET and a second gate bias circuit configured to bias a gate of the second clamp FET.

Fault tolerant low leakage switch

Subject matter herein can include identifying a biochemical test strip assembly electrically, such as using the same test circuitry as can be used to perform an electrochemical measurement, without requiring use of optical techniques. The identification can include using information about a measured susceptance of an identification feature included as a portion of the test strip assembly. The identification can be used by test circuitry to select test parameters or calibration values, or to select an appropriate test protocol for the type of test strip coupled to the test circuitry. The identification can be used by the test circuitry to validate or reject a test strip assembly, such as to inhibit use of test strips that fail meet one or more specified criteria.

Susceptance measurement for identifying biochemical sensors

A control circuit for use with a four terminal sensor, such as a glucose sensor. The Glucose sensor is a volume product and typically its manufacture will want to make it as inexpensively as possible. This may give rise to variable impedances surrounding the active cell of the sensor. Typically the sensor has first and second drive terminals and first and second measurement terminals, so as to help overcome the impedance problem. The control circuit is arranged to drive at least one of the first and second drive terminals with an excitation signal, and control the excitation signal such that a voltage difference between the first and second measurement terminals is within a target range of voltages. To allow the control circuit to work with a variety of measurement cell types the control circuit further comprises voltage level shifters for adjusting a voltage at one or both of the drive terminals, or for adjusting a voltage received from one or both of the measurement terminals.

Control circuit for use with a sensor, and measurement system including such a control circuit

A digital sine wave may be converted to an analog signal at a digital to analog converter (DAC). The converted analog signal may be supplied to a device and an analog return signal from the device may be passed through a relaxed anti-aliasing filter and converted to digital code words at an analog to digital converter (ADC). An impedance may be calculated from the results of a Fourier analysis of the digital code words. The ADC and DAC clock frequencies may be asynchronous, independently variable, and have a greatest common factor of 1. The clock frequencies of the ADC and/or DAC may be adjusted to change a location of images in the ADC spectrum. By using these different, adjustable clock frequencies for the ADC and the DAC, an analog signal may have increased aliasing without introducing signal errors at a frequency of interest.

Impedance measurement device and method

A control apparatus is provided that can provide high dynamic resolution and is suitable for inclusion within an integrated circuit. The control apparatus receives a demand signal representing a desired value of a measurand, and a feedback signal representing a present value or a recently acquired value of the measurand. The processing circuit forms a further signal a further signal which is a function of the demand and feedback signals. The further signal is then subjected to at least an integrating function. The demand signal, feedback signal or the further signal is processed or acquired in a sampled manner. The use of such sampled, i.e. discontinuous, processing allows integration time constants to be synthesized which would otherwise require the use of unfeasibly large components within an integrated circuit, or the use of off-chop components. Both of these other options are expensive.

Closed loop control system, and an amplifier in combination with such a closed loop control system

A clock generator is disclosed for use with an oscillator device. The clock generator may include a signal conditioning pre-filter and a comparator. The signal conditioner may have an input for a signal from the oscillator device, and may include a high pass filter component and a low pass filter component. The high pass filter component may pass amplitude and frequency components of the input oscillator signal but reject a common mode component of the oscillator signal. Instead, the high pass filter component further may generate its own common mode component locally over which the high frequency components are superimposed. The low pass filter component may generate a second output signal that represents the locally-generated common mode component of the first output signal. The clock generator may have a comparator as an input stage which is coupled to first and second outputs of the filter structure.

Clock generator for crystal or ceramic oscillator and filter system for same

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Mallow, Ireland

Donal Bourke